Research On RF Front - End Technology Of Low - Level Control System For Superconducting Accelerator

In the accelerator applications, the demand for high quality electron beam is increasing, and the stable high frequency accelerating field has a very important significance in producing the high quality electron beam. High frequency low level control system uses feedback control to guarantee the stable high frequency accelerating field in the superconducting cavity. This paper is based on the national project of the Institute of applied Electronics, China Academy of Engineering Physics, which is the development of the high average power THz scientific equipment. The research focuses on the amplitude stability and the phase stability of the superconducting accelerator cavity, and accomplishes the technology and experimental studies of the RF front-end in the high frequency low level control system.The RF front-end can make an appropriate RF signal down converter processing, so that the following ADC module can handle the lower frequency. RF front-end has a function of detecting signal, amplifying signal and filtering out the noise and clutter. The RF front-end design includes four modules, the clock generator module, the local oscillation signal generating module, the frequency down converter module and the frequency carrier module, this paper focuses on the constitution principles and hardware construction of the RF front-end, and completes the related experimental studies. Besides, this paper accomplishes the RF front-end design for the superconducting cavity of the high average power THz scientific equipment.This paper mixes the1.3GHz signal generated by the signal source8663A and the30.72MHz signal generated by the AD9858direct digital synthesizer to generate the vibration signal1330.72MHz. The30.72MHz signal generated by the AD9858is used as the reference signal of the clock board AD9510for generating ADC and DAC driving sampling signal of122.88MHz and245.76MHz. According to the measurement, the clock signal timing jitter is around4ps, the amplitude and phase of sampling error caused by the jitter is±0.04%and±0.025%, in line with the design requirements. This set of RF front-end design uses a combination of DDS source and local oscillator source to generate the local signal module and the clock signal distribution module. This scheme can avoid the phenomenon of phase floating in the different signal source, and works well in measurement and performs highly effective, which can be used in similar devices.