Design And Verification Of High-Efficiency Wide-Bandgap Microwave Power Devices

Since the 21st century,the wide bandgap microwave power device industry has brought vigorous vitality to the fields of civil communications,aerospace,national defense and military.With the development of the microelectronics industry,"energy saving,emission reduction,green and high efficiency"has become the consensus of all countries.At present,for the design of microwave power devices,the main research direction is to improve performance,and there are few researches on efficiency as the main design goal.Therefore,it is very meaningful to improve the efficiency of microwave power devices as much as possible under the application conditions.This dissertation takes the existing 4H-SiC MESFET and GaN HEMT as the research objects.Through simulation analysis,the dependence of device energy-efficiency on device performance and its sensitive factors are studied,the dependence of performance parameters on device structure parameters is obtained,and the influence law and mechanism of device structure parameters on device energy conversion efficiency are obtained.The design of high-efficiency microwave power devices provides device-level basic theory and design methods.A total of five new microwave power devices are proposed in this dissertation,and the energy-efficient design of the three new 4H-SiC MESFETs mainly revolves around the channel layer and buffer layer of the device.When optimizing the channel region for high energy efficiency,the larger the size of the optimization target,it is generally beneficial to improve the frequency characteristics of the device,but usually reduces some DC characteristics;when optimizing the buffer layer,the number and size of the recessed buffer layer mainly affect For the DC characteristics of the device,it is necessary to focus on optimizing the relationship between the structural parameters and I_dsat and BV.The energy-efficiency design of the two new GaN HEMTs mainly lies in the barrier layer and buffer layer of the HEMT device.When optimizing the barrier layer,although the recessed barrier layer can improve the breakdown and frequency characteristics,the barrier layer should not be too thin,otherwise it will cause the current to collapse,I_dsat,P_out,and PAE will drop.Due to the formation of two-dimensional electron gas on the surface of the GaN buffer layer,the design of the buffer layer should pay attention to the size of the recessed region,otherwise it will significantly affect the DC characteristics of the HEMT,which will have a negative effect on the improvement of high power output and PAE.The main innovations of this dissertation are as follows:（1）A novel double symmetric stepped oxide buried layer（DSB）MESFET is proposed.Through research,it is found that the left step buried oxide layer（BOX）improves the gate-source capacitance(C_gs)and maximum saturation leakage current(I_dsat)of the device,and the right BOX layer mainly changes the I_dsat and breakdown voltage（BV）of the device,DSB The structure increases the I_dsat of the device by more than 5%,reduces the C_gs by 10%,increases the BV by 14%,and increases the cut-off frequency（f_t）and maximum oscillation frequency(f_max)by 11.9%and 20.3%,respectively.The greater the increase of BV and I_dsat,the higher the drain efficiency（η_d）of the device;the decrease of C_gs and the increase of f_tand f_max improve the power gain（G_p）of the device,and finally the new structure makes the power added efficiency（PAE）of the device increased by 20.3%.Through analysis,for the DSB structure,as the size of the two BOX layers changes,there are extreme points in PAE.When the left and right BOX heights are both 0.1μm,the left and right bottom BOX thicknesses are both 0.05μm,the top widths of the left and right BOX layers are 0.2μm and0.4μm,and the bottom widths of the left and right BOX layers are 0.3μm and 0.8μm,respectively,PAE is the best.PAE improvement is mainly achieved by increasingη_d and G_p.（2）Based on the multi-recessed drift region（MRD）MESFET,the recessed regions on both sides of the device gate are optimized,and an improved IMRD MESFET is obtained.The transconductance（g_m）of the device is reduced by 17.8%m S/mm,the threshold voltage（V_t）is reduced by 1.08V,C_gs is basically unchanged,and the gate-to-drain capacitance(C_gd)is reduced by 48.7%.The simulation results show that PAE first increases and then decreases with the length L₁ of the left depression,and first increases and then decreases with the thickness H₁;it increases with the increase of the length L₂ of the right depression,and first increases and then decreases with the thickness H₂.When the PAE is the largest,the narrowing of the conductive channel leads to a significant drop in I_dsat.Therefore,when designing the MRD structure for high energy efficiency,the values of H₁ and H₂ are adjusted to the inflection point of I_dsat drop.Currently,there is no significant drop in PAE.Finally,after high energy-fficiency design,when the values of L₁,L₂,H₁ and H₂ are 0.5μm,0.2μm,0.15μm and 0.2μm,the PAE of IMRD MESFET is 28.66%higher than that of the traditional structure.It can also be seen from this example that the PAE improvement of the IMRD structure is achieved by sacrificing part of the DC performance in exchange for a substantial increase in PAE.（3）Based on the multi-recessed p-buffer（MRB）MESFET,an improved IMRB MESFET is proposed.The IMRB structure optimizes the original concave buffer layer.Although part of the BV is sacrificed,the structure increases I_dsat,g_m,and maximum output power(P_out)by91.1%,15.5%,and 32.4%,respectively,and the frequency characteristics remain basically unchanged.The improvement of I_dsat and P_max helps to improveη_d,thereby improving PAE.According to the simulation results,the larger the length m of the left concave buffer layer,the PAE first increases and then maintains a balance;the larger the length n of the right concave buffer layer,the PAE gradually decreases;the larger the thickness Z of the two concave buffer layers,the PAE first increases and maintain balance after increasing.By optimizing the design,when the values of m,n and Z are 0.5μm,0μm and 0.1μm,respectively,the PAE of the IMRB structure is 40.29%higher than that of the traditional structure.（4）The double recessed barrier layer（DRBL）HEMT is designed with high energy-efficiency,and the optimized improved IDRBL HEMT is obtained.Through the simulation of the structural parameters of DRBL,it can be seen that with the increase of the length L₁,L₂ and thickness H₁,H₂ of the DRBL,the V_t,transconductance peak value(G_mmax)and C_gsof the device gradually decrease.Reducing C_gs and G_mmax can make the device obtain higher G_p,and increasing V_t is beneficial to the improvement of PAE.After high energy efficiency design,the sizes of L₁,L₂,H₁ and H₂ are 0.7μm,0.8μm,4nm and 4nm respectively.At this time,the I_dsat of the device is reduced by 6.8%,the breakdown voltage is increased by 10.9%,and the V_t is increased to 1.48V,G_mmax increased by 6.8%,C_gs decreased by 8.6%,and PAE increased by 47.97%.From the results,the IDRBL structure sacrifices some DC parameters in exchange for higher PAE.（5）A HEMT device with a high gate and multiple recessed buffer（HGMRB）structure is proposed.The simulation results show that the I_dsat and G_mmax of HGMRB HEMT are slightly decreased,but the BV is increased by 16.7%,the C_gs is decreased by 17.0%,and the f_max is increased by 15.78%.The improvement of BV and f_max is beneficial to improveη_d and G_p,so PAE will also increase.After high energy efficiency design,the optimal gate height H₁ is5nm,the length and width H₂ and L_BR1 of the left concave buffer layer are 4nm and 0.5μm,respectively,and the length and width H₃ and L_BR2 of the right concave buffer layer are 4nm and 1.5μm.At frequencies of 600MHz,1.2GHz,and 2.4GHz,the PAE of the dual-die parallel simulation is 90.8%,89.3%,and 84.4%,respectively,while maintaining a large power density.（6）In cooperation with a research institute,a high energy-efficiency verification of a GaN HEMT die power amplifier with a DRBL structure was carried out.The parameters of the DRBL HEMT die were extracted,and through ADS simulation optimization,the high-energy-efficiency IDRBL structure optimization plan was obtained,and the HEMT die with the IDRBL structure was developed based on this optimization plan.Experiments show that in the continuous wave range of 2.0GHz～2.5GHz Inside,the P_outof the power amplifier is large than 50d Bm,and the PAE is large than 70%.When the P_out is basically unchanged,the efficiency of the IDRBL structure is about 16.7%higher than that of the DRBL structure.Therefore,the high energy-efficiency design theory proposed in this dissertation is feasible.