Research On ReRAM-based Hardware Security Technologies

With the development trend of the Internet of everything,the level of social intel-ligence continues to improve,and the data-intensive applications at the mobile end are developing rapidly.As a new electronic device,the ReRAM can realize not only the non-volatile storage of data,but also the logical computation.It is the cornerstone of the next-generation high performance computing ways,such as logic in memory and re-sistive neural network.However,these high performance computing methods have not been commercialized due to the reliability and security problems of the ReRAM itself.At the same time,under the background of large-scale popularization of intelligent devices,the traditional data encryption based on pseudo-random numbers acting as the keys and non-volatile data storage based on flash memory face severe security challenges,and the physical stochasticity of resistance transformation process of ReRAM can be used as the entropy source of hardware security circuit.Therefore,the research on ReRAM-based hardware security technology is of great significance to the study and development of the next-generation secure and reliable high performance computing systems.The cur-rent research of this field is still in its infancy.The reliability and security performance improvement in the ReRAM itself,ReRAM-based true random number generator circuit design and implementation,ReRAM-based secure memory cell design and implementa-tion,and ReRAM resistance switching behavior variation modeling need to be further studied.In view of the above aspects,this paper has carried out research work on the fabrication and test of ReRAM devices,the design and implementation of the hardware security circuit,and the fitting of the ReRAM Verilog-A model and the simulation of the hardware security circuit.The main contents are as follows:（1）A Pt/Ti/(Ti O_2-x)/Ta₂O₅/Pt structure ReRAM with low operating voltage and electroforming-free property has been successfully fabricated by electron beam evapo-ration system.An ultrathin layer of Ti O_2-xrich in oxygen vacancy defects is formed between Ti and Ta₂O₅by redox reaction.The Ti O_2-xlayer acts as the resistive functional layer during the resistance transitions of the ReRAM.Therefore,the ReRAM does not need to undergo a electroforming process to produce oxygen vacancy defects in the de-vice for its high and low resistance state transitions prior to the normal resistive switching process.Moreover,because the resistive region is extremely thin,the ReRAM exhibits a lower SET/RESET voltage.The linear fitting results of the I-V characteristic curve of the ReRAM in double-logarithmic coordinates show that the resistance transition process is dominated by the capture/release of free electrons in the conduction band,conducetd by the oxygen vacancy defect occupying the deep level in the band gap,which proves the ex-istence of deep level electron traps in the device.Then,a random bit generation method based on the ReRAM is proposed.Compared with the similar method,the random bit generation efficiency is higher and the power consumption is lower.（2）Based on the randomness of the RESET process of the ReRAM,a true ran-dom number generator with simple structure and no data post-processing is designed and implemented.The resistance transition process of Ti N/Ti/Hf O₂/W structure ReRAM is controlled by the physically stochastic formation/“fusing”process of oxygen vacancy conductive filament.Therefore,the resistance transition behavior of this ReRAM is in-evitably variable.The experimental results show that the high resistance value of the ReRAM exhibits random evolution under the modulation of“RESET”voltage pulse se-quence,that is,the number of“RESET”voltage pulses required to drive the same ReRAM from similar low resistance state to a fixed threshold high resistance state is variable in different operating cycles.The designed true random number generator can extract the differential voltage pulse number and generate four mutually independent random bit se-quences simultaneously.The generated random bit sequences pass the test of the interna-tionally recognized randomness detection software NIST SP800-22 issued by the Amer-ican National Institute of Standard and Technology without any data post-processing.（3）A serial ReRAM unit is designed and implemented for hiding stored data under the special ReRAM device condition.The memory unit consists of two ReRAMs in series.When the two ReRAMs are in different resistance states,the memory unit can store logic’0’and logic’1’respectively.When both ReRAMs are in the low resistance state,the memory unit switches to the data hiding state,in which an attacker cannot steal the logical value by analyzing the resistance state of the single ReRAM,even if the system is powered off.Moreover,the memory unit can switch between the logical storage state and the data hiding state under corresponding operations.Most importantly,due to the symmetrical distribution of resistance state of the serial ReRAMs when the unit stores different logic values,the operating current information of the memory cell is independent of the stored logic values,so the memory cell is able to resist power consumption attacks.Then,a serial ReRAM cell array structure is proposed,which can resist physical attacks effectively.（4）A variation Verilog-A model fitting method for ReRAM is proposed and the physical unclonable function is simulated based on the fitted ReRAM Verilog-A model.The intrinsic Verilog-A model of Si O₂-based Ti N/Ti/Hf O₂/W structure ReRAM is fitted successfully according to the measured resistive switching parameters.The difference is successfully introduced into the intrinsic model by making the relevant model parameters show certain random distribution,and the variation Verilog-A model of the ReRAM is fitted.The simulation results show that the measured resistive switching parameters are well reproduced in both the intrinsic model and the variation model.Then simulation work about the physical unclonable function based on the both models has been done and the results show that when designing hardware-security circuits based on the ReRAM varia-tion model,it is necessary to balance the inter-variation and the intra-variation,otherwise the hardware-security circuits will be disordered.