Studies On Characteristics Of Fast Switching And Near-field Electromagnetic Emissions For Silicon Carbide Power Modules

Silicon Carbide(Si C)power devices have advantages in high-power and high-frequency applications over Si-IGBT(silicon-based insulated gate bipolar transistor)devices,due to the superior properties of fast-switching and low loss as well as high-temperature operation.Therefore,they are expected to instead of Si-IGBT devices in appli-cations such as power transmission and distribution,rail transit,and electric vehicles/hybrid electric vehicles(EV/HEV).In order to meet the urgent needs of these applications for higher current level,higher switching frequency,higher power density and higher conversion efficiency,the highy integrated power module has become a mainstream trend in the development of Si C devices,and the enabling advantages of Si C power devices/module with the fast-switching and high-frequency performance is the key to determining its market application breakthrough.The operating conditions of low DC bus voltage(e.g.,V_DD:200-600V)and high output current(e.g.,I_O:200-600A)bring a critical challenge for enabling performance advanages of highly-integrated electric control system or power control unit(PCU)which is based on Si C power module in EV/HEV applications.Currently,the slope of drain-source voltage(dv _DS/dt)during the first stage of falling(?₁(on))is about 5V/ns for Si C power module.In order to improve furtherly the fast-switching performance,it is important to study the characteristics of switching transient and the limiting factors of switching speed.At present,the swiching frequency is generally about ten kilohertz(k Hz)for Si C power moudles.In order to fully realize the advantage of high-frequency performance,it is essential to in-crease the switching frequency while maintaining the advantages of fast-switching performance.However,as the switching frequency inceases,the electromagnetic interference(EMI)issues by the fast-switching and high-frequency operations are becoming more serious.As the conducted EMI emissions rises,the coupling interferences caused by near-field EMI emissions have begun to emerge,because the various components are closely placed together due to the high-density integration of PCU.For these issues in EV/HEV applications,four kinds of Si C power modules are designed and fabricated,the influence of power dies,module structure and operation conditions on characteristics of the fast-switching and near-field electromagnetic emissions are studied in this thesis.In the field of the fast-switching performance,the key factors affecting fast-switching performance and limiting the rise of switching speed have been studied.These key factors include operation condition of low DC bus voltage and high current of output,negative feedback effects and structural design scheme of power module.In the field of the high-frequency performance,a buck and a boost con-verter are built,the spectrum of near-field EMI emissions and its spatial distribution in the near-field of Si C power-module are studied.Through this research work,this thesis finally reveals the underlying mechanisms behind the influence of different structural designs on characteristics of fast-switching and near-field electromagnetic emissions for Si C power modules.The achievements and innovations are as follows:(1)For power loss reduction with increase of the switching speed is constrained in EV/HEV applications,four kinds of Si C power modules are designed and fabricated.The influence of Si C power dies,module's struc-ture and operation conditions of low DC bus voltage and high output current on fast-switching characteristics of the module has been studied,the underlying machnisms of drain-source voltage(v _DS)plateau phenomenon,the machnism of non-linear characteristcs for v _DS waveform at the end of the linear falling region is clarified.Compared with difference of Si C power dies,the discrepance of module's structure has a significant impact on characteristic of v _DS waveform.The influence of module's structure on characteristics of v _DS waveform is weakened as V_DD reduces and strengthened as turn-on speed rises.If turn-on speed is fast enough,under condition of high V_DD,the two-stage falling characteristic of v _DS waveform will become negligible,while under condition of low V_DD,a voltage plateau characteristic will be observed in v _DS waveform.The increase in output current of load(I_O)just ex-tends the lasting time of the voltage plateau characteristic of v _DSwaveform,it does not change the value of the voltage plateau,resulting in a more obvious characteristic of v _DS plateau.The plateau prevents the rapid drop of v _DS,therefore,the method of reducing the switching loss of power module by increasing the switching speed in EV/HEV applica-tions is constrained.Under condition of low V_DD and high I_O,if turn-on speed of Si C power module is relatively high(such as di _DS/dt is more than 2.64A/ns)the time inverval of miller plateau for gate-source voltage(v_gs)overlaping with that of first stage falling(?₁(on))for v _DS,and the effect of miller plateau of v_gscan be reflected on v _DS waveform during this shared sub-interval by the interval of miller plateau for v_gsand?₁(on)for v _DS,resulting in a voltage plateau characteristic on v _DS waveform;if turn-on speed is slow the time inverval of miller plateau for v_gs appears after?₁(on)for v _DS,there is no any overlap between them,the effect of miller plateau of v_gscan not be reflected on v _DS waveform,the voltage plateau characteristic is not developed on v _DS waveform.When V_DDand turn-on speed are both high,the increased V_DD shortens the interval of?₁(on)and delays the interval for miller plateau of v_gs,so that the interval for miller plateau of v_gs is separated with?₁(on),consequently,the voltage plateau characteristic is not developed in v _DS wave-form while the two-stage falling characteristic of v _DS waveform will become negligible.The phenomenon that the plateau of v _DS waveform on upper-side higher that that on lower-side are attributed to the discrepancy in the shared path of drain-source routings and power loop between upper-side and lower-side inside the module.The parasitic inductance of the shared path on upper-side is higher than that on lower-side by 2.81n H,consequently,the v _DS plateau on upper-side is higher than that on lower-side at V_DD of 200V and 100V by 50V and 25V,respectively.This theis has also suggested that discrepance of v _DS plateau between upper-and lower-side could be minimized by reducing parasitic inductance of the path which is shared by drain-source routing of upper-side and power loop of module.Furtherly,the underlying mechanism of the non-linear characteristc for v_DS waveform at the end of the linear falling region is clarified in this thesis.It found that as turn-on speed rises the change of linear falling character-istic of v _DS waveform is attributed to a converting from positive to negative for the polarity of discriminant for a quadratic equation with analytical expression of gate-source voltage as a solution.Due to this converting of the discriminant's polarity,the dv _DS/dt is transformed from a constant into a variable,while the significant decrease of this variable when the falling of v _DS waveform approaches to the end of?₁(on)causes the linear falling characteristic of v _DS waveform with time to disappear in the end of?₁(on).(2)For the influence of negative feedbacks on fast-switching characteristics,various schemes of common-source path and structural designs are designed;equivalent circuit models for negative feedbacks are proposed;the mechanism of negative feedbakcs of Si C power modules are studied by simulation,analytical modeling analysis and experiments;eventually the mechanisms behind different negative spike of v_gs waveforms between upper-and lower-side is disclosed and the quantitative constraints of the allowable maximum di _DS/dt is sum-marizd.The proposed structural designs of the module increase significantly the allowable maximum switch-ing speed.For the discrepancy in the characteristics of excessively low negative voltage spike for v_gs between upper-side and lower-side,namely,the v_gs spike of upper-side is superimposed by a high frequency oscillation of 83.3MHz while the v_gs spike of lower-side contains no oscillation during the process of v_gs being pulled down,this thesis views negative feedback effect of miller capacitance as a short-time current source(i _D?G)which injects into gate driver loop,the equivalent circuit topoly of gate driver loop for upper-side is different from that of lower-side.In upper-side the current source is connected in parallel with a series branch of parasitic inductance and resistance of gate driver loop,then this parallel-connected branch is connected in series with parasitc capacitance of gate loop;however,in lower-side the current source is connected in parallel with resistance of gate driver loop,then this parallel-connected branch is connected in series with parasitic inductance and inductance of gate driver loop.The proposed equivalent models reveal the mechanism behind the different characteristics of excessive low negative spike of v_gs between upper-and lower-side.The falling process of drain-source voltage at turn-on transient is modeled analytically,the negative feedbacks from miller capacitance and common-source inductance have also been and simulated and calculated analytically.The influence of different structural designs of common-source path on allowable maximum turn-on speed Si C power module is revealed by the comparative analysis of experiments and analytical calculation.For the structural design of minimal common source path,as turn-on speed rises,dv _DS/dt in?₁(on)increases,when the dv _DS/dt in?₁(on)in-creases to a value which is approaching or equal to that of?₂(on),a negative spike could be developed in v_gs waveform,so that the rise of turn-on speed is limited significantly.However,for the structural design of additional common source path,when the dv _DS/dt in?₁(on)increases to a value which is much smaller than that of?₂(on),a negative spike could be developed in v_gswaveform,so that the rise of turn-on speed is limited.The proposed optimal design of module structure which includes minimal common-source path and symmetrical routings of parallel dies increases the allowable maximum di _DS/dt by more than 50%.(3)For the issues that EMI emissions increase with the rise of the switching speed and switching frequency,and high-density integration of PCU module causes the coupling failure of EMI emission at the near-field,this thesis reveals the spectrum of near-field EMI emissions and the distribution of peak emissions at the near-filed for Si C power modules,and clarifies the machanism behind the influence of structural design on its near-field electromagnetic characteristics.The proposed structural scheme of minimal common-source path can signifi-cantly improve near-field electromagnetic characteristics of power module,and the symmetrical designs of routings for parallel power dies reduce significantly the high-frequency range electromagnetic emission(HFR)at the near-field.This thesis reveals that near-field electromagnetic emission of Si C power module is divided into two types.One is the low-frequency range(30-120MHz)electromagnetic emission(LFR)which is corresponding to power terminals of power module.The LFR is the electromagnetic emission by the current loop antenna that composed of drain-source routings inside module and power terminals of module.The switching transient characteristics of i _DS have significant impact on LFR.The other is the high-frequency range(120-500MHz)electromagnetic emission(HFR)which is corresponding to the gate and source pins of power module.The HFR is generated by dipole antenna that composed of gate-source routings inside module and the gate and source pins of module.The switching transient characteristics of v_gs have significant impact on HFR.Structural design scheme of minimal common-source path can significantly improve characteristics of near-filed electromagnetic emission for Si C power module and eliminate the abnormal emissions of the module in a frequency band from 500MHz to 900MHz.HFR can be reduced by increasing the uniformity of gate-source paths for parallel dies,and LFR can be reduced by improving the uniformity of the drain-source path for parallel dies.Compared with the developed moudule with minimal common-source path,the proposed symmetrical design for gate-source routings of parallel dies increases the uniformity of gate-source routings for parallel dies on upper-side of the module by27.10%,accordingly,the HFR is reduced by 8.25%and 11.07%when the module operates in a buck converter at switching frequencies of 10k Hz and 100k Hz,respectively.The achievements of this thesis provide a theoretical basis and practical reference for enabling the advantages of Si C high-power module in high-speed switching and high-frequency operation.It also gives a valuable guidance for the structural design of Si C high-power module and a collaborative design of highly integrated electrical control system and PCU module in EV/HEV applications.