CHARGE-COUPLED ANALOG COMPUTER ELEMENTS AND THEIR APPLICATION TO SMART IMAGE SENSORS (TUNNEL OXIDE, PARALLEL PROCESSING, ROBOTICS)

Real time machine vision in mobile robots requires pre-processing of images at speeds well in excess of one billion operations per second, depending on the resolution of the image plane. To obtain such high speed in a compact, light-weight, and low-power computing system, alternatives to the standard serial digital processor are currently being explored. The spatially parallel architecture, in which the inter-processor communication structure reflects the topology of the focal plane mosaic of elemental sensors, is organized in a way natural for image pre-processing. The most logical place for the processor array is the imaging focal plane. Such positioning avoids the serial encoding and transmission of the inherently parallel input data, but the available real-estate places a premium on processor simplicity and innovation.;Also investigated in the course of this research was the bistable metal/tunnel-oxide/semiconductor (MTOS) junction. The application of this device as a charge packet magnitude comparator was explored by utilizing its hot electron impact ionization internal positive feedback mechanism.;The control circuitry integrated with the MTOS junction provided a unique opportunity to investigate the internal charging and discharging currents of the thin oxide capacitor. Using a novel charge packet injection technique, the dynamic response of the junction was studied and a measure of the oxide hole transport current and hot tunneling electron induced impact ionization current was made as a function of oxide voltage. The MTOS junction can also be controlled in a steady state manner by utilizing a diode-controlled MOS inversion layer to pin the MTOS junction surface potential. (Abstract shortened with permission of author.).;In this dissertation, an analog processor based on the manipulation of discrete charge packets in a semiconductor is advocated. Such a processor shows promise for high density focal plane computing. The work focuses on the basic building blocks of the charge-coupled computer, a charge packet differencer/replicator and a charge packet magnitude comparator. The former is implemented in a novel circuit in an inherently linear and compact way through the use of three-dimensional charge coupling.