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Production planning and scheduling for semiconductor device testing

Posted on:1996-12-05Degree:Ph.DType:Dissertation
University:University of California, BerkeleyCandidate:Carmon, Tali FriedFull Text:PDF
GTID:1469390014486720Subject:Engineering
Abstract/Summary:
In this dissertation the semiconductor device testing process is analyzed and modeled. The goal is to accurately model the capacity of the final test stage of semiconductor manufacturing for long-term planning models, and to find good short-term scheduling strategies for this complex production environment. Better scheduling methods increase the throughput of the facility, as well as provide data to increase the accuracy of long-term planning. The information on the arriving product mixes, the scheduling principles, and statistics of rate efficiencies of test heads can be fed back to the planning system to create an accurate capacity model of the test facility that can be used to plan its production and to evaluate its performance.; This is the first attempt to capture all the complexities of the shared-CPU semiconductor testing environment, and to model a large variety of testing environments for scheduling purposes. Several simplified versions of the test-floor scheduling problem are identified as well-known combinatorial optimization models. The general test-floor scheduling problem is then formulated and a computerized enumeration program is developed for determining the highest value schedule. The state-space representation of the semiconductor test operations captures the unique structure and characteristics of the semiconductor device test equipment.; The enumeration program proposed herein serves as a benchmark, generating optimal solutions against which heuristics may be compared. It also serves as a platform for developing heuristics. Various rules may be devised to restrict consideration of unpromising nodes in the state-space, thereby speeding up the algorithm's execution.; Both the capacity modeling problem and the test scheduling problem are characterized by theoretical complexity, thus finding good solutions for them has theoretical value. The suggested models can be used to solve planning and scheduling problems arising in a variety of production environments, ranging from small ASICs manufacturing firms to large, mass production type companies.
Keywords/Search Tags:Semiconductor device, Test, Production, Scheduling, Planning, Problem
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