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Yield estimation for surface mount area array devices

Posted on:1997-03-02Degree:Ph.DType:Dissertation
University:State University of New York at BinghamtonCandidate:Huang, Yu-WenFull Text:PDF
GTID:1468390014983878Subject:Industrial Engineering
Abstract/Summary:
Market driven demand for smaller and lower cost consumer electronic products with enhanced functionality has resulted in an urgent need for semiconductor packaging technologies which can accommodate larger, more complex integrated circuits in smaller and thinner packages. Although the use of fine pitch technology in Printed Wire Board (PWB) assembly has increased substantially, the electronics industry hesitates to enter the ultra-fine pitch arena due to the possibility of decreased process yields. Area array packages, especially Ball Grid Arrays (BGAs), are the result of a new packaging technique which by all indications, has a promising future due to its leadless package configuration and its compatibility with the existing standard surface mount PWB environment. Recently, an assembly process that attaches flip chips directly on to the PWB has also drawn attention. This Direct Chip Attachment (DCA) method can result in significant cost savings in board real estate and material used due to the smaller chip size and the elimination of chip carriers. Due to similarities in the configuration of the inputs/outputs, the MSA process can be viewed, in a sense, as the micro operation of a BGA assembly process. However, it is expected that several precautions need to be taken when implementing a DCA process owing to the smaller lead pitch and the smaller ball size.;The objective of this research was to develop a robust surface mount PWB assembly process for the BGA and DCA components through a methodology that used both experimental and theoretical approaches. The domain factors considered primarily related to the standard surface mount PWB assembly process including solder paste deposition, component placement, and reflow soldering. Board, component, and placement machine related parameters were also considered. Experiments were designed and developed to investigate important assembly process and material related parameters as and when needed. The assembly process was modelled and simulated using a Monte Carlo based strategy to help predict yields and to investigate the impact of process parameter variations. The research strategy adopted helped to identify detailed recommendations for the assembly of area array devices.
Keywords/Search Tags:Area array, Surface mount, Process, Assembly, Smaller
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