A model-continuous specification and design methodology for embedded multiprocessor signal processing systems

The process of designing large real-time embedded signal processing systems is plagued by a lack of coherent specification and design methodology. A canonical waterfall design process is commonly used to specify, design, and implement these systems with commercial-off-the-shelf (COTS) multiprocessing (MP) hardware and software. Powerful frameworks exist for each individual phase of this canonical design process, but no single methodology exists which enables these frameworks to work together coherently, i.e., allowing the output of a framework used in one phase to be consumed by a different framework used in the next phase.; This lack of coherence usually leads to design errors that are not caught until well in to the implementation phase. Since the cost of redesign increases as the design moves through these three stages, redesign is the most expensive if not performed until the implementation phase, thus making the current incoherent methodology costly. This dissertation shows how designs targeting COTS MP technologies can be improved by providing a coherent coupling between these frameworks, a quality known as "model continuity."; We have developed a new specification and design methodology (SDM) which accomplishes the requirements specification, design exploration, and implementation of COTS MP-based signal processing systems by using powerful commercial frameworks that are intelligently integrated into a single domain-specific SDM. Our integration establishes model continuity by using autogenerated computation (VSIPL) and communication (MPI) standards-based middleware. We have dubbed our new SDM MAGIC, an acronym for "Methodology Applying Generation, Integration, and Continuity."; To measure improvement, we have developed an analytical means of measuring SDMs in our domain by quantifying Sarkar's unified basis for evaluating specification-modeling methodologies. We measured computer-aided system engineering (CASE) SDMs capable of generating real-time code and our own MAGIC SDM, and found the MAGIC SDM was much closer to ideal than the CASE SDMs. We have also validated the MAGIC SDM and demonstrated its efficacy with a real-world benchmark. In so doing we also demonstrated that the MAGIC SDM is clearly superior to both VHDL virtual prototyping and the CASE-based SDMs that must commit to an implementation technology before performing design analysis. We also consider further research directions.