| Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing architecture, which is the manner in which wires, FPGAs and Field-Programmable Interconnect Devices (FPIDs) are connected.;This dissertation provides new insight into the strengths and the weaknesses of two popular existing routing architectures: the Partial Crossbar and the Mesh. New hybrid architectures, that use a mixture of hardwired and programmable connections, are proposed. The new architectures are the Hybrid Torus Partial-Crossbar (HTP), the Hybrid Complete-Graph Partial-Crossbar (HCGP) and the Hardwired Clusters Partial Crossbar (HWCP).;We evaluate and compare several MFS routing architectures by using a rigorous experimental approach that employs real benchmark circuits. The circuits are mapped into the architectures using a customized set of partitioning, placement and inter-chip routing tools. The architectures are compared on the basis of cost (the total number of pins required in the system) and speed (determined by the post-inter-chip routing critical path delay).;The key parameters associated with the partial crossbar and the hybrid architectures are explored. For the partial crossbar, the effect of varying the number of pins per subset (Pt), on the routability, speed, and cost is minor. For the hybrid architectures, a key parameter, the percentage of programmable connections (Pp), is explored and we experimentally determined that Pp = 60% gives good routability across all the benchmark circuits.;We show that the Partial Crossbar is superior to the 8-way Mesh architecture. We show that one of the newly proposed hybrid architectures, HCGP, is superior to the Partial Crossbar. The HTP architecture is shown to be inferior to the HCGP and only marginally better than the Partial Crossbar. The HWCP architecture is evaluated compared to the HCGP architecture and gives encouraging routability and speed results.;Overall, the results show that for single board MFSs, the HCGP is the best among all the MFS routing architectures evaluated. |
