| In this paper, a robust 100-GHz enhancement/depletion-mode implanted MESFET MMIC process will be presented.; In order to achieve the target RF performance, a 0.1-μm gate-length process was developed first. Electron-beam lithography was employed to produce the desired gate structure. Wet etch was used for channel recess etching. The recess profile was also carefully engineered for optimized RF and power capabilities.; To integrate enhancement- and depletion-mode devices, an experiment was designed for selecting the correct implant schedules that can yield predefined threshold voltages. Combined with the 0.1-μm gate technology, the possibility of a 100 GHz enhancement/depletion-mode implanted MESFET MMIC process was demonstrated.; Device performance including dc and RF results for 0.1-μm MESFETs as well as circuit performance including 38- and 77-GHz MMIC results will be given to demonstrate the feasibility of this process for low-cost, high-volume, millimeter-wave IC applications. |
