Real-time imaging systems for synthetic aperture radar using course quantized correlators with VLSI realization

This dissertation proposes two architectures for Synthetic Aperture Radar (SAR) image processing. The dissertation begins with a thorough review of the basics, including a literature review followed by a careful development of the mathematics of SAR. The SAR signal equations, the two-dimensional SAR data space and the quadrature conversion of the input data are also presented. From this review, it is determined that processing in the time domain using correlation with a reference signal is the best choice for a VLSI based real time image processing system because of the simple parallel structure of the imaging algorithm in the time domain.; The first SAR image processing architecture uses coarse quantization and an off-the-shelf correlator chip. This chip is a 2-bit 3-level correlator designed for radio astronomy and developed by the Microelectronics Research Center, University of New Mexico, Albuquerque, NM. This integrated circuit uses 2-bit accumulators instead of multipliers and asynchronous 32-bit ripple counters to accumlate the partial products at a clock speed of 100 MHz and has 1024 such processing elements per chip. In this dissertation the potential of these correlator chips in the development of real time SAR processor systems is thoroughly explored. A non-linear model for quantization is developed which shows inter-modulation and harmonic distortion. This can be a significant effect when using coarse quantization and can produce noise that is an order of magnitude (or more) greater than the traditional quantization noise. It is found that the nonlinear distortion dominates the system noise when using coarse quantization. The nonlinearity of quanitization is analyzed for coarse quantized SAR systems and it is shown that such systems suffer a dynamic range limitation of about 10 dB due to this effect with 3-level quantization. There is scope to improve the performance of these coarse quantized correlators with signal processing techniques. Hence, coarse quantized correlators offer SAR a practical and a viable way to process data and produce images in real time.; The second SAR processing architecture is based on a full custom VLSI correlator design which is also developed in this work. Careful attention is paid to streamline the data path and to allow the ICs to be added in parallel to meet the computational needs of the system. A few design strategies for range and azimuth correlators in the time domain are also discussed. In the development of both of these systems a careful study of range migration correction (RMC) is made and a new cut-and-paste RMC technique is developed using shift registers within the time-domain correlator structure.