Architecture and design of a monolithic radio frequency receiver

The growing emphasis on "personal communications" throughout the telecommunications industry has stimulated the demand for substantial reductions in the cost, size and power dissipation of radio components. Unfortunately, the present generation of radio front-end electronics has not benefited in a significant way from modern VLSI technology. Instead, progress has come largely from the advances in the technologies used to package discrete components.;Advances in VLSI technology have greatly increased the speed and density of transistors, making it feasible to implement a substantial amount of high-speed signal processing functions in a single integrated circuit. The objective of this research is to explore ways in which signal processing can be used to integrate the filter functions of a receiver onto a single chip. In the course of this work, a receiver architecture has been developed that eliminates the need for external tank circuits and intermediate frequency (IF) filters, thereby allowing most of the receiver to be integrated in a standard silicon technology.;The proposed receiver architecture avoids the need for precision off-chip IF filters through the use of subsampling and discrete-time analog filters. The mixing function in a traditional superheterodyne receiver is replaced by sampling the input at well below the RF carrier frequency, while channel selection and antialias filtering are accomplished by means of a cascade of analog sampled-data filters.;An experimental prototype of the front-end for a 900-MHz RF receiver has been integrated in a 0.6-...