III-V semiconductor processing: Contacts, etching, and devices

Semiconductor processing of III-V materials is a vast topic, but this dissertation focuses on contacts, etching, and devices in very specific ways. The first chapter investigates the use of e-beam deposited SiO and SiO ₂ to prevent galvanic effect etching of AuGe contacts for GaAs intergrated circuits. In the second chapter, the material characteristics of e-beam deposited SiO and SiO₂ as hydrogen free dielectrics are studied. The third chapter shows how the overhang visible on the (011) GaAs cross-section can be eliminated during wet-etching, making metallization possible in any direction. Chapter four discusses the fabrication of PNP InGaAsN heterojunction and double heterojunction bipolar transistors for low power applications. Chapter five shows the first efforts of our group in the field of spintronics. Fabrication methods for processing a spin field effect transistor on an InGaAs/InAlAs system are explored. Finally, chapter six outlines testing of spin field effect devices and the group's ongoing efforts in this area.