Signature-based testing of analog and RF circuits

In this dissertation, a low-cost signature test framework for accelerated production testing of analog and RF circuits is presented. A simulation-based methodology is developed for automatic generation of signature test stimuli for analog circuits. Through the use of an optimal framework, the test stimuli facilitate accurate prediction of analog specifications from measured device-under-test (DUT) signatures. The test methodology is simulation efficient and robust in the presence of measurement noise. Applications of the signature test framework in high speed and RF testing are demonstrated. A framework for low-cost signature test of RF circuits is proposed using modulation of a baseband test signal and subsequent demodulation of the DUT response. It is demonstrated that RF specifications can be accurately predicted using alternate measurements. Due to the use of an extremely short duration baseband test stimulus for extracting the DUT performance specifications, significant test time savings for RF circuits are made possible. A novel, high throughput jitter measurement technique for embedded PLLs is presented. The technique promises considerable savings for measuring jitter resulting from power supply switching noise. Finally, a feedback-driven signal backtrace procedure is proposed to extend the signature testing concepts to large analog circuits with multiple embedded modules. The proposed hierarchical framework generates tests based on simulating individual embedded modules rather than the circuit as a whole. This results in a significantly lower simulation complexity for signature testing of large analog circuits.