| The objective of this dissertation is to characterize the low-frequency noise in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) and to develop optimized bias and process conditions for better device noise performance. The physics behind the generation of low-frequency noise in Metal Oxide Semiconductor (MOS) devices and the related existing models are studied to understand the characteristics of this type of noise. The existing models have several limitations, making them unable to explain low-frequency noise accurately over the entire region of device operation. By pointing out the limitations of existing low-frequency noise models, a new modified model is proposed. To study the low-frequency noise behavior and validate the predicted results by the proposed model, wafer-level, computer-controlled noise measurements were made using sophisticated noise amplifiers and a spectrum analyzer with negligible pickup noise. Low-frequency noise of surface and buried channel N and P MOSFETs were measured over a wide range of bias, geometry and process conditions. These experimental results agree with the noise calculated by the proposed modified model with great accuracy.; Some new characteristics of low-frequency noise, such as noise reduction by applying a low forward body bias and almost one order reduction of flicker noise through post-oxidation annealing, were observed for the first time and are explained qualitatively and quantitatively by the modified noise model. From the experiments, it was also established that buried-channel P MOSFETs show better noise performance than surface N MOSFETs, especially under low gate bias. Optimized bias and process conditions are proposed to achieve minimum noise in MOSFETs. |
