| Mixed analog and digital circuit implementation on a single chip has revolutionized telecommunication and portable multi-media terminals, which require mobile computing along with transceiver and digital signal processing capability. With an increasing drive towards compactness and portability in wireless terminals, there is a need for high power density and high efficiency DC-DC converters. For state-of-the-art mobile terminals, a multi-output centralized power management unit powers various sections of the mixed signal integrated circuits (ICs), memory chips, radio frequency (RF) front-end, synthesizers, digital base-band, signal processors, and micro-controller. As these ICs are scaled to deep sub-micron dimensions, internal switching frequencies become orders of magnitude faster than off-chip signals. In this case, external power supplies and control logic are incapable of responding to varying load conditions without significant delay. Another problem is the mixed-signal supply coupling, where the power bus lead inductance causes ground and power supply line bounce due to the digital switching noise. This will generate switching noise on the power lines connected to sensitive analog and RF sections.; The proposed research consists of designing, modeling, prototyping, and characterizing a monolithic distributed power management architecture supplying various loads present in a mixed-signal IC. The focus is on low-power portable applications, where small size, low cost, and high efficiency are the primary design objectives. The proposed architecture consists of high-efficiency low-power single-stage and two-stage interleaved monolithic zero-voltage switching (ZVS) synchronous buck DC-DC converters, connected to the input battery voltage. The single-stage buck converter generates the supply for the digital loads, and the two-stage interleaved buck converter generates the supply for the analog load. By proper placement and integration of the DC-DC converters adjacent to the various IC blocks, significant reduction in power supply interconnect delays can be achieved. This improves the transient response of the converter, reduces the distribution losses, the parasitic inductance in the path, and the switching noise. |
