Font Size: a A A

Components for affordable integrated CMOS millimeter-wave systems

Posted on:2014-02-07Degree:Ph.DType:Dissertation
University:The University of Texas at DallasCandidate:Wu, Chieh-LinFull Text:PDF
GTID:1458390008954945Subject:Engineering
Abstract/Summary:
The progress in modern Complementary Metal Oxide Semiconductor (CMOS) technology has made implementation of millimeter-wave circuits in low cost digital CMOS process feasible. However, high testing and packaging cost and the concern for low yield of CMOS millimeter-wave circuits have led to researches on tuning millimeter-wave components based on on-chip voltage measurements and integrating an on-chip antenna into a transceiver chip. This dissertation demonstrates the possibility of implementing high linearity tunable millimeter-wave mixers that incorporate on-chip voltage detectors and increasing on-chip radiation efficiency in digital CMOS processes.;A new body tied silicon on insulator (SOI) transistor with comparable fT and fmax as those of floating body transistors is demonstrated. The new body tied transistor is used in a tunable mixer. Moreover, a new Schottky barrier diode (SBD) with the junction formed by copper interconnection layers and silicon is demonstrated to have smaller junction capacitance than the traditional SBD with the junction formed by silicide and silicon.;The first CMOS multiple gated transistor (MGTR) mixer operating at millimeter wave frequency is demonstrated in a digital 45-nm SOI CMOS process. The mixer achieves input referred third order intercept point (IIP3) of 17dBm, conversion power gain of -0.5dB, and single side band noise figure of 12.1dB at radio frequency of 28GHz.;A new method to improve the gain and noise figure of MGTR circuits is presented and applied to millimeter-wave mixer designs. A 31-GHz double balanced mixer with output third order intercept point (OIP3) of 21.4dBm, power gain of 3.4dB, and single side band noise figure (NF) of 9.5dB is demonstrated. The gain and input matching of its tunable single balanced version can be tuned using internal millimeter-wave voltages measured using on-chip detectors. Furthermore, an on-chip matching frequency estimation technique is demonstrated by using the peak point and valley point in the frequency response curve generated from the Schottky-diode detectors.;Finally, a solution to increase the on-chip antenna radiation efficiency is proposed. By properly designing the printed circuit board (PCB) on which the on-chip antenna is mounted, an on-chip monopole antenna with 33% efficiency and 1.35 dBi peak gain is demonstrated in HFSS simulation.
Keywords/Search Tags:CMOS, Millimeter-wave, On-chip, Demonstrated, Gain, Antenna
Related items