| This dissertation presents a simulation study of a novel CMOS device architecture capable of building complementary logic operation using only a single gate stack. The new architecture, named complementary orthogonal stacked MOS (COSMOS), places the n and p-MOSFETs perpendicular to one another under a single gate. As a result of concurrent vertical and lateral integration, the COSMOS architecture can lead to dramatic savings in active device area of a conventional static CMOS pair, as well as significant reductions in R-C device parasitics. We demonstrate how the COSMOS devices may be built, operated, and optimized for symmetric operation, also verifying logic operation via 3D device simulations. The proposed COSMOS architecture is based on strained Si/SiGe on insulator (SSOI) technology that has recently become available. This work is the first comprehensive treatment of general properties of COSMOS architecture to our knowledge and should allow designers to understand and design COSMOS devices and circuits in future. |
