| Design of imaging systems for emerging applications are fraught with challenges, mainly due to limitations in the readout circuits. Many such applications require imaging of scenes with fast moving objects with high intrascene variations in irradiance and suffer from undesirable scene disturbances. In several other applications the target is obscured by a large background signal, which necessitates very high readout accuracy.; The recent development of CMOS image sensors and the emergence of 3D-IC are providing the opportunity for the development of a complete system-on-chip solution that seeks to mitigate these challenges. This dissertation explores an integrated approach to the design of image sensor readout circuits in which signal processing techniques are used to relax the demands on the analog circuits. Two different designs are described and experimental results from the implemented prototypes demonstrate successful solutions towards meeting the application needs.; To address the high irradiance variation challenge, FMC, a new high dynamic range, high speed readout architecture, is developed. Dynamic range is extended using synchronous self-reset while high SNR is maintained via multiple non-uniformly spaced captures and least-squares fit. The fabricated prototype achieves 138dB dynamic range and 62dB peak SNR at 1000 frames/sec with energy consumption of 25.5nJ per pixel readout.; The large background challenge is mitigated by a per-pixel background subtraction circuit, in which charge packets controlled by a pulse frequency modulation signal are subtracted from each pixel's integrator. A pixel array prototyped in a 0.18mum CMOS process achieves noise, linearity, and spatial current variation of 175ppm, 270ppm, and 3%, respectively, at 43 frames/s. |
