A fully integrated transmitter for on-wafer wireless testing

A fully integrated transmitter with embedded on-chip antenna for on-wafer wireless testing (OWT) is presented. The goal of OWT is to replace high-speed I/O pins in conventional probe cards with wireless links during IC manufacturing test. In this dissertation, key enabling technologies for OWT are investigated. First, an accurate on-chip antenna characterization method is developed to enable the assessment of antenna gain, which is essential for establishing the wireless link budget between a wafer and a tester. Second, an image rejection transmitter with on-chip antenna is designed for sending signals wirelessly from a wafer to a tester. Finally, the design of an antenna switch that permits on-chip antennas to be shared among multiple transmitters and receivers is presented.;Increasing interest in the integration of antennas on chip is fueled by a number of emerging applications ranging from miniature RFID tags to millimeter-wave radios. On-chip antennas have been demonstrated with promising performance for short-range (<10 m) communications; however, an accurate characterization method to determine the on-chip antenna gain and the radiation pattern is still lacking. A novel on-chip antenna characterization method that achieves improved accuracy and sensitivity is developed. The method utilizes a two-step technique using discrete antennas for calibration and to characterize on-chip antenna. Based on the proposed method, on-chip antenna gains over a wide frequency bandwidth are measured. The measured data showed excellent repeatability. Using a folded dipole as a test vehicle, we confirm that a typical on-chip antenna can support OWT with good sensitivity.;To demonstrate wireless testing from a wafer to a tester, a fully integrated image rejection transmitter is employed. By exploiting the sensitivity of the image rejection ratio (IRR) to I and Q path mismatches, the RF and image signals are wirelessly transmitted through the on-chip antenna. The gain of a loop antenna and dipole antenna are compared by using two different transmitter designs. The wirelessly measured IRR results showed consistency with results obtained by direct probing. The proposed IR transmitter provides two distinctive functions. It can replace the I/O pins during testing and can act as a process variation monitoring circuit. Monte Carlo simulations are used to aid the analysis of the sources of amplitude and phase mismatches in the IR transmitter. To reduce the area requirement for implementing the OWT, it is desirable to minimize the number of on-chip antennas due to their large dimensions. On-chip antenna switches enable the antennas to be shared by several transmitters and receivers. Trade-offs and design guidelines for implementing a CMOS antenna switch to achieve high linearity at frequencies above 20 GHz are investigated. The circuit techniques to facilitate performance optimization among linearity, isolation, switching speed, insertion loss and silicon area are studied in detail. A prototype of a 24-GHz transmit/receive switch is designed in a 90 nm CMOS process. It achieved the highest linearity in the smallest footprint among previously published CMOS switch designs operating above 20 GHz.