Researches On And Design Of Low Power Software Defined Radio In Inter-Satellite Communications

Research and Development?R&D?of a conventional large satellite often requires the joint efforts from thousands of teams.The development cycle is generally very long and the cost is huge.The development of small satellites has become a hot research topic.Many countries and organizations all over the world are exploring to deploy a medium-size mother satellite and hundreds of laptop-size small satellites in a cluster at Lower Earth Orbit?LEO?aiming at developing more applications such as intelligence investigation,wartime communication recovery,synthetic aperture radar,etc.The traditional design approach,which only adopts a single programming language and single development tool on a single platform,cannot meet the requirements of mass production and short development cycle very well.Compared with communications in chargeable devices,small satellite communication system has posed much more stringent limitations on Size,Weight,and Power?SWaP?as well as hardware resources.In addition,dramatic increases in the number of small satellites and smaller inter-satellite spacing make the spectrum available for satellites more crowded.Therefore,solutions to these issues require:?1?a new design approach to improve design efficiency and rapidly conduct the prototype verifications,and a platform that has the capability of parallelly sending and receiving,dynamically adjusting the rate and signal bandwidth,and supporting multiple Radio Frequency?RF?protocol standards.?2?improved and optimized algorithms,simplified structures,and new schemes to reduce the computation complexities,hardware resources usage,and power consumption.?3?transceiver operating in a higher frequency band to offer more spectrum.In this dissertation,numbers of solutions are proposed to address the key technique bottlenecks and challenges in designing low power Software Defined Radios?SDRs?for Inter-Satellite Communications?ISCs?.Specifically,the main contributions of this dissertation can be summarized as below:?1?Model-Based Design?MBD?approach for designing SDRs in ISCs is proposed.Special processes including automatic code generation,deployment of customized Intellectual Property?IP?cores,and in-the-loop testing are added into the conventional MBD framework to form a unique design and implementation approach for SDRs in ISCs.On the one hand,automatic code generation significantly improves design efficiency,shortens the development cycle and reduces the cost.Convenient deployment method of customized IP cores ensures the diversity of standards and functionalities in SDRs.The proposed in-the-loop testing schemes accelerate the construction of prototype.On the other hand,the MBD approach provides graphic design and visual models,supports multiple programming languages,integrates multiple design tools and debug environments,and allows software and hardware co-design as well as the visual modules to be embedded with customized Hardware Description Language?HDL?modules,which helps to find the early potential design errors.?2?A low power transmitter prototype is designed and implemented using the MBD approach on a Field Programmable Gate Array?FPGA?System on Chip?SoC?based SDR platform,in which the total power in the baseband processor and transmitter RF front end is only 4.6 W.An improved encoding hardware implementation approach for Low Density Parity Check?LDPC?code is proposed through transforming the parity check matrix of LDPC code into a special lower triangular matrix and reducing the number of parity check bit generators.Based on the improved approach,a new hardware implementation structure for the LDPC encoder is designed,in which only one parity check bit generator is utilized.The synthesized reports demonstrate that implementation structure using the improved encoding approach reduces the power by 0.522 W.?3?A low power receiver prototype is designed and implemented using the MBD approach,in which the total power in the baseband processor and receiver RF front end is only6.7 W.In the Automatic Gain Control?AGC?module,a simplified scheme to detect the magnitude of a complex signal is adopted and its corresponding implementation structure is designed,which effectively avoids large numbers of square and square root operations.In the frequency compensation module,an improved Luise algorithm is proposed.Through the approximation of weighted coefficients and reordering of additions and multiplications,an improved implementation structure for Luise algorithm is proposed and designed,in which the corresponding multiplications are replaced by implementing a 9-bit shift operation.In addition,a simplified LDPC decoder with fully parallel structure is designed.The synthesized reports demonstrate that the simplification in the decoder helps to reduce power by 0.832 W.?4?A low power scheme is proposed for the small satellites cluster system,in which a joint network LDPC code over the Multiple-Access Relay Channel?MARC?is studied and applied in the cluster system to reduce the transmission power of the entire system.A relay model involved in the communications among a relay satellite,two sources satellites,and a mother satellite is built and the corresponding joint network LDPC decoding algorithm is proposed.By transforming the relay model to a two-path model with one direct link and one virtual link,another improved joint network LDPC decoding algorithm based on the Maximal Ratio Combining?MRC?method is further proposed.In addition,the corresponding SDR structures for the relay and mother satellites are designed.The simulation results demonstrate that the proposed relay model using the improved algorithm reduces the transmission power of the entire system by 45.04%at the specified Bit Error Ratio?BER?of 10^-8.In this dissertation,an elaborate design approach of SDRs in ISCs is described.The great superiorities of MBD approach for SDR design are demonstrated by designing a specific transceiver prototype.Meanwhile,multiple strategies,algorithms,implementation structure,and schemes are proposed to reduce hardware resources usage and power consumption.In a conclusion,this dissertation provides a theoretical guidance and design approach for the low power SDR design in ISCs.