Standard Electron Devices At Cryogenic Temperatures For Quantum Computing

Quantum computing is considered to be an important technology in the post-Moore era and is currently widely concerned by scientists from all over the world.Both super-conducting quantum chips and semiconductor quantum chips operate at extremely low temperatures of a few tens of millikelvin,but the cooling power of the dilution refrigera-tor which can provide millikelvin temperature environment is very limited.The readout and control system of the quantum chip operate at room temperature.The measurement and control system at room temperature and the quantum chips at extremely low temper-ature are connected by long and expensive cables,and several stages of filters and heat sinks are needed in the middle of the cable to reduce noise.Even so,the quantum chip signal will be mixed with a large amount of noise including the room temperature ther-mal noise floor,which greatly reduces the reliability of the test results and consumes the valuable cooling power of the dilution refrigerator.At the same time,the cost of cables used in quantum computing tests is high.With the increase in the number of quantum bits,the mode of adding a very low temperature quantum chip to a room temperature test system is almost difficult to expand.We can solve this problem by designing a quantum chip measurement and control circuit that works at very low temperatures.However,existing electronic components must work in a specific environment,and there are dif-ferent degrees of failure at very low temperatures.In particular,the most commonly used CMOS integrated circuits can only work inelectrical a temperature environment of-55 to+125?,and are lacking.Very low temperature model required for circuit design.This paper is aimed at testing and modeling the properties of electronic components in extremely low temperature environment in the extremely low temperature environ-ment experienced by electronic components in quantum computing applications,filling the gap of the domestic liquid temperature CMOS SPICE model,and then based on the model is designed to design the basic transistor-level logic.The main research contents of this thesis are as follows:(1)Build a cryogenic environment test platform that can measure the characteris-tics of electronic components at different low temperatures;(2)Test the low temperature performance of electronic components such as capac-itors,resistors,diodes,high mobility field effect transistors,LBJT,STTMRAM;(3)Analyze the cryogenic test results and theory of electronic components,and perform the characterizaton and compact modeling of SMIC 0.18?m Bulk CMOS pro-cess MOSFET at 4.2K;(4)Design and simulation of liquid helium temperature transistor-level logic cir-cuits based on our CMOS SPICE model.The innovations of the thesis are as follows:(1)Cryogenmc characterization and modeling of 0.18?m CMOS technology are pre-sented in this thesis.This work is the first BSIM SPICE model range down to 4.2K for standard CMOS technology;the model can be applied directly to device and circuit electronic design automation(EDA)simulation for industrial tape-out.(2)The threshold voltage,switching ratio,and process resistance of 300?4.2K CMOS transistors were systematically tested for the first time,and the measurement results were analyzed.(3)The STTMRAM and LBJT performance under 4.2K was tested for the first time.STTMRAM and LBJT have a lot of frontier research in academia,but their per-formance at low temperatures has not been reported.(4)The combinatorial logic circuit under extremely low temperature was designed for the first time,and the combination logic circuit was simulated and verified with the cryogenic CMOS model.