Research On Memory Management And Fault Tolerance Mechanisms Based On NVRAM

The new non-volatile memory technology(NVRAM)is maturing fast in recent years.It offers featurs including byte-addressable,large capacity,fast access,and non-volatility.The emerging of NVRAM will bring new challenges and opportunities for the current memory systems and the upper software systems.Current research on NVRAM can be divided into two categories: research at hardware level and research at software level.Research at hardware level is relatively abundant and it mainly focuses on overcoming NVRAM's defect such as the short lifetime and slow writing.On the contrary,research on software level is far from sufficiency and there are many points that are worth researching.Specifically,previous studies on managing NVRAM rely much on file systems,which incur considerable software overhead.Meanwhile,the non-volatility NVRAM offers will bring new opportunities for fault tolerance.Previous studies on this just focus on using it for fast checkpointing.New fault tolerance mechanisms are still in need.Based on the above situation,in this paper we mainly do research on developping high efficient memory management systems for NVRAM and new fault tolerance mechanisms based on NVRAM.Our main work and contribution is listed below:1)High efficient memory management for NVRAM.We propose a high efficient non-volatile memory manager(NVMM)for NVRAM to better manage it and offer support for upper applications to access it directly.We extended the traditional VMM(virtual memory manager)in operating system kernel to support the non-volatility of NVRAM.Specifically,we do research on supporing dynamic allocation of non-volatile memory region,managing the virtual-physical relationship of NVRAM,and maintaining the data consistency of the persistent data stored in NVRAM.Experiments show that our NVMM can achieve higher performance on managing NVRAM compared with previous work that relies on file system to manage it.2)High efficient transactional memory system based on NVRAM.We propose a high efficient transactional memory system for upper applications to update its persistent data in a consistent way.The interface we offer is simple and easy-to-use.In the underlying implementation,we introduce two efficient logging mechanisms that helps maintain the data consistency.Compared with traditional logging,our logging mechanisms can reduce the writes to NVRAM and thus improve performance and the lifetime of NVRAM.3)Fine-grained memory access monitoring and checkpoint.We propose a flexible memory access monitoring mechanism which is based on the paging and virtualization mechanisms provided by hardware.Based on that,we implemented an incremental checkpoint tool.Our incremental checkpoint tool achieves higher performance by reducing the amount of checkpoint data.4)New fault tolerance process model based on NVRAM.We propose new process model based on NVRAM for fault tolerance.By introducing a new intermediate software layer between the underlying hardware and the upper process,we are able to decouple them and re-organize all the process' s state in NVRAM.Then we introduce a version number mechanism: each piece of process' s data is given a version number and this version number will be increased when the corresponding data is modified.With the version numbers,we are able to recover the process' s state into a consistent state after system crash.We demonstate our idea based on scheme language interpreter and experiments show that our new process model could achieve fault tolerance with very little overhead.