Low-dimensional Nanoelectronic Device Design Based On Multi-scale Simulation Process

In today's world,the information technology(IT)is developing rapidly.As the basis of IT,evolution on semiconductor technology is also fast.According to the Moore's law,the number of components per integrated circuit will double every 18-24 months.As consequence,the channel lengths of the transistors keep reducing,improving the transport velocities of the carriers and the performance of the whole circuit.Meanwhile,along the reducing gate area,the control ability of the gate on carriers will also be degraded,leading to bad switching performance in the transistors.To overcome the problems,it is necessary to investigate new structures and materials.Among the explorations,the most interesting aspect is the novel electronic devices based on low-dimensional semiconductor materials.Owing to the diverse properties and technology issues,it is also necessary to study the device and material properties using simulation methods.Therefore,we have investigated and developed a multiscale simulation flow.Based on the flow,the devices are studied from aspects of structure,material,and operating principle.Furthermore,the device and material properties can be modulated by size,edge,topology,doping,saturation,Van der Waals force,and so on.The explorations have provided new ideas on novel electronic device designs and performance predictions.Compared with traditional bulk materials,the simulation methods on low-dimensional devices are essentially different.In traditional methods,the transports are based on the drift-diffusion and electron emission theories.The quantum corrections are only needed in some extreme cases.In comparisons,the quantum transport is dominant in low-dimensional materials.Moreover,because of the high activities and tunabilities,detailed analyzes are required from the inner-materials.Besides,the material investigations should be reflected into the transport properties simultaneously.Therefore,according to varies low-dimensional materials and their experimental behaviors,we first use first-principle simulation method to obtain their electronic properties.Then,the electron wave functions are transformed into the tight binding(TB)form and the properties are included into the Hamiltonian parameters.Last,using nonequilibrium Green's function(NEGF)method,the transport properties of the corresponding devices are obtained by solving the Poisson's and Schrodinger's equations iteratively.Along the invention of FinFET,the technology changes from two-dimension(2D)to three-dimension(3D),improving the transistor performance significantly.After the FinFET,gate-all-around(GAA)FET is regarded as the best device structure blow 7 nm technology,because of its excellent gate control ability.In the GAA FET,we have studied the quantum confinements induced by the cross-sectional shapes,including circle,square,and triangle.The discoveries of graphene and other 2D materials have stimulated the whole semiconductor research area significantly.Because of the high surface-area-to-volume ratios,the 2D materials possess many unique properties that have not been observed in bulk materials,such as the compatibility with plain semiconductor technology and high activities.Taking graphene and phosphorene as two subjects,we have studied their unique properties in MOSFET applications.For examples,the bandgaps in graphene nanoribbons(GNRs)are extremely sensitive to the ribbon widths,leading to significant current fluctuations in the GNR MOSFETs;the GNR parameters are affected by edge saturations and topology variations,which causes the GNR MOSFETs,performance variations;the carrier transports in phosphorene are asymmetry.With the help of new materials and structures,the performance of MOSFETs is improved significantly.However,the limit in physics still exists.To enhance the carrier velocities step further,tunneling FET(TFET)is thus proposed.The carriers in TFET are mainly transferred by tunneling.Therefore,they are not restricted to the physical limit in MOSFETs.The current on-to-off ratios in TFETs can reach to a high level within a small gate voltage range,which will definitely reduce the power dissipations.However,the uniform band structures will enlarge and reduce the TFETs' on and off state current simultaneously.Therefore,using the GNR band structure engineering theory,we have designed two kinds of GNR heterojunctions and used them in the TFET applications.We have also proposed a new TFET analyzation and design method as a foundation for the TFET application.Besides logical devices,we have also discussed the pressure sensor application using bilayer phosphorene.The bandgap of bilayer phosphorene will be reduced by normal pressures and this pheonomenon is futher enhanced by cutting the phosphorene into phosphorene nanoribbons.Therefore,the conductivity is increased exponentially and a high sensitivity can be achieved in the sensor.In this paper,we focus on the frontiers of micro-and nano-electronics and keep developing the advanced simulation flow.Our explorations extend from material to device properties.We have also tried to explain the novel device properties from the view of physics.Our studies have proposed some new ideas for the semiconductor development in the future.