Interface Engineering And The Application In Floating Gate Memory Cell Of MoS₂ Transostors

The feature size of field effect transistors continue to decrease in the quest for higher performance and integration.However,the heat caused by the static power limits the reduction in size of FETs comprising 3D semiconductors.The main reason for the increased static power and the leakage between the source and drain electrodes are the short channel effects.Moreover,it is almost impossible for silicon to decrease the thickness down to 5 nm,which makes the integration with feature size below 7 nm even harder.In FETs with channels made from 2D semiconductors,the electrons are limited in atomic thin channels and leakage current is almost negligible,hence,can be strongly controlled by the gate voltage.The arena of 2D materials is becoming densely populated since the isolation of graphene in 2004.After that many materials-conducting,insulating and semiconducting-have been discovered.MoS2 is one of the most concerned materials since it shows atomic thickness(0.6 nm for monolayer),suitable band gap(1.8 eV for monolayer and 1.2 eV for multilayer),high mobility(above 400 cm2/V·s according to first principle calculation)and highon/off ratio(above 10).Studying the characteristics and improving the performance of MoS2 based transistor might be a promising candidate to improve the semiconductor integration.Moreover,the atomic thickness and the thickness dependent band gap can create new applications and opportunities in many other aspects such as memory,flexible electronics and biosensor etc.1.MoS2 transistor with metallic nanocrystal embedded in the gate dielectric are fabricated.Atomic thick MoS2 channel and nanocrystal floating gate are combined and memory cells with 4 different metallic nanocrystal floating gate are used as the charge trapping layer.Memory cells with Au nanocrystal are found to have a large memory window of 10 V,high progran/erase ratio approximate 105 and long retention time of 10 years.The high performance of MoS2 based metallic nanocrystal floating gate memory indicates a promising research direction for nonvolatile storage.2.Direct ALD can't form uniform dielectric on MoS2 since there is no dangling bonds on it.Using buffer layer will decrease the capacitance,which is not suitable for device scaling.We use a buffer layer free method to fabricate high performance top gated transistors and perform a detailed statistical study to investigate the influence brought by the deposition of HfO2 for the first time.Firstly,we fabricate devices with 10 nm thick HfO2 gate dielectric,and the highest field effect mobility is as high as 46 cm2/V·s.The leakage current is about 0.2 pA/pL|.m2 at 6.5 MV/cm when the gate dielectric is reduced to 6 nm,which is the thinnest gate dielectric for MoS2 transistors Due to the thickness dependent top gated mobility decrease,we found that choosing appropriate MoS2 thickness can effectively control the influence brought by the deposition of HfO2,2-3 layers are more suitable for logic devices and thicker ones are more suitable for devices with higher output current.Utilizing the optimized channel length and strong gate control,high drain current density of 612 ?A/?m is achieved in the multilayer MoS2 with a channel length of 250 nm.3.CVD hexagonal boron nitride tunneling layer was used to reduce the Schottky barrier height and improve the contact between metal and MoS2.Benefiting from the atomic thickness of h-BN,the Schottky barrier can be greatly reduced with small tunneling resistance.After inserting an ultra-thin layer h-BN into to the contact interface,we obtained the reduced Schottky barrier height of 31 meV and contact resistance of 1.8k?·-?m,which were improved from 158 meV and 5.1 k?·?m respectively.It was observed that further increasing the thickness of h-BN did not significantly reduce the Schottky barrier height,however it will increase the tunneling resistance.Owing to the optimized tunneling contact,a typical FET showed a high field effect mobility of 73.0 cm2/V·s and output current of 330 ?A/?m at room temperature,which can be further improved to 321.4 cm/V·s and 572 ?A/?m at 77 K respectively.Meanwhile,negative differential resistance(NDR)effect was also obeserved at low temperature,which can be attributed to self-heating effect,indicating the importance of heat dissipation.This work provided a deeper insight look for MIS contact and is a promising way to achieve low contact resistance on MoS2 in large scale.