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Research On Design Method Of GaAs HBT-based Ultra-high-speed Folding-Interpolating ADC Chip

Posted on:2015-03-31Degree:DoctorType:Dissertation
Country:ChinaCandidate:J C ZhangFull Text:PDF
GTID:1268330431462470Subject:Integrated circuit system design
Abstract/Summary:PDF Full Text Request
Analog-to-digital converters (ADCs) convert the analog signals (voltages, currents andetc.) into digital signals (normally binary), connecting the analog quantity to digital system,being widely used in various electronic field. There are many different types of ADCs usedfor quite distinct purposes. ADCs are designed according to their specifications. Among allkinds of ADCs, high-speed ADCs are becoming more and more important and widely appliednowadays.The gallium–arsenide (GaAs) heterojunction bipolar transistor (HBT) technology isadopted to implement the ADC system since many of its features are attractive, which areimportant in mixed-signal MMIC design, such as high resistivity substrate and highbreakdown voltage. In addition, GaAs HBT has potentially higher fTthan CMOS, and it isless costly than InP HBT and SiGe BiCMOS because of its simpler process.In this dissertation, the design approach of GaAs HBT ultra-high-speedfolding-interpolating ADC has been studied. Based on the analysis of various types of ADCstructures, ultra-high-speed ADC architecture used in this study was determined. A noveldevice model considering radiation effects for GaAs HBT was proposed. Based on the modelestablished in the dissertation, the ADC circuit was designed. The main studies andcontributions are as follows.(1) The design and experiment study of a high speed ADC, which is an essentialcomponent in communication systems, have been performed. The ADC features a6-bitresolution, a3-Gsps sampling rate and was implemented in WIN1μm GaAs HBT technologywith cutoff frequency fTof60GHz. Afolding-interpolating architecture was used in converterto provide the sampling rate of giga hertz, wide bandwidth and medium resolution as well asreduce the power dissipation and chip area of the circuit.(2) To complete ADC ciucuit-level design, a novel model for GaAs HBT was presentedin the dissertation. In order to predict the effects of gamma irradiation on GaAs HBT, a novelmodel was presented considering the irradiation effects. Firstly, according to thecharacteristics of GaAs HBT, a simplified VBIC model was proposed. Secondly, Based on theanalysis of irradiation-induced degradation in GaAs HBT, the simplified VBIC model wasfurther amended. Its validity was demonstrated by analysis of the experimental results ofGaAs HBT before and after gamma irradiation.(3) The ultra-high-speed ADC consists of a track-and-hold amplifier, a reference resistorladder, four folding amplifier, an interpolating resistor string, a comparator array, a digital encoder including an XOR array, a NOR array and a15-to-4ROM, and a coarse quantizerincluding a bit synchronization circuit. To meet the test requirements, a1:4DEMUX was alsodesigned on the chip.(4) The design and test results of a6-bit and3-Gsps analog-to-digital converter (ADC)using1μm GaAs HBT technology are presented in this work. The monolithicfolding-interpolating ADC makes use of a track-and-hold amplifier (THA) with a highlylinear input buffer to maintain high effective number of bits (ENOB) and1out-of-rangefolding factor of folding amplifier to improve the static performance. The ADC occupies anarea of4.32mm×3.66mm and achieves5.53bit ENOB with an effective resolutionbandwidth of1.1GHz at a sampling rate of3Gsps. The maximum DNL and INL are0.36LSB and0.48LSB, respectively. The ADC consumes5.43W from a single6V power supply.The presentedADC acheives5.08×1010the effective resolution bandwidth figure of merit.
Keywords/Search Tags:Anolog-to-digital converter, Folding-interpolating architecture, Gallium-Arsenide (GaAs) Heterojunction Bipolar Transistors (HBTs), Gammaradiation effect, Device model
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