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Research On Memory Power Optimization Based On System Spatio-temporal Behaviors

Posted on:2015-01-19Degree:DoctorType:Dissertation
Country:ChinaCandidate:Z W ZhuFull Text:PDF
GTID:1268330428499685Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the rapid development of semiconductor technology and increasing integration of circuit chips, system’s power has significantly restrained the improvement of system performance. High power consumption will lead to increasing temperature and directly affect system’s performance, costs, reliability and lifetime. As the bottleneck of whole system, memory system’s large-bandwidth and high-capacity demands are growing day by day. Therefore, memory power has become a hot topic in both academe and industry community.This dissertation focuses on balancing system’s performance, power and fairness of sharing resource. By integrating with the operating system and system architecture, we intend to address the key theories and technologies of task behaviors, memory management system and thread-group scheduler, and so on, which facilitates us to propose the effective memory power management solution. The primary contents are as follows:1. Memory Management System Based on System BehaviorsMemory modules currently provide many power states and system must have enough idle time to fully exploit these states. Since memory management system is in charge of allocating and releasing resources, the key to control these power states lies in how to distribute data on physical memory chips by the aid of memory manager. Therefore, we firstly analyze the impacts of memory address mapping scheme on data distribution and system power, and then a power-aware memory management is introduced to carry out the target optimization. Secondly, from the view of applications’ behaviors, we propose a memory manager framework to improve power efficiency, which can adopt different polices to meet various resource demands during thread’s lifetime.2. Thread-Behaviors Directed Group SchedulerIt may not fully exploit task behaviors only based on its own demands while ignoring scenario’s constrains. Therefore, in order to optimize the cache conflicts of multi-core platform, we firstly illustrate the impacts of Android scenario on thread behaviors and then propose to partition threads having similar behaviors as one group to schedule while keeping system response speed and fairness.3. Descriptive Methods of System BehaviorsAs an effective way to save memory power, the technology of dynamic voltage frequency scaling (DVFS) is different with former power states managements. It is an ineffective way to utilize DVFS while only considering data distributions, and the frequencies will be usually scaled based on thread’s runtime resource demands. There are numerous works on analyzing characteristics of task behaviors by using PMU events at the hardware level, but their granularity is so fine to ignore high level information. Other works aimed at distinguishing thread phase behaviors are normally adopt the time slice or firmed instructions length as the basic unit. They are incomplete from the perspective of thread’s functional logic and this distinction may be blindness and break thread’s natural behaviors. Hence, we introduce the function event tool to illustrate task behaviors throughout whole levels, such as system architecture, operating system and applications. Finally, the DVFS framework is formed with the help of function event tool.Thread behaviors plays the key role in managing system power. Compared with other works, the contributions and innovations of this dissertation include:1. We firstly estimate the impacts of memory architecture on system’s power behaviors and then propose a power-aware memory management system.2. Through analyzing threads’ runtime behaviors on resource demands, we introduce a performance/power directed memory management framework to fully exploit intra-thread varied behaviors and inter-thread dependencies.3. Impacts of Android scenario and its programming model on thread behaviors provide thread-group scheme’s theory basis. The concept of thread-behaviors group scheduler is then proposed to optimize multi-core cache conflicts issue while keeping system’s response speed and thread fairness.4. This dissertation proposes the function event tool to portray task behaviors, and then we provide the system call and Android message to support this tool’s implementation. Finally, operating system’s DVFS scheme is conducted according to function event tool.
Keywords/Search Tags:power, memory power states management, DVFS, memory mappingscheme, thread group, characteristics of task behavior, function event, task significance
PDF Full Text Request
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