Research On Radiation-hardness-by-design For Digital Pixel CMOS Image Sensor

CMOS (Complementary Metal Oxide Semiconductor) image sensors arecurrently the main stream technologies for solid-state imaging. Their excellentcapabilities have allowed CMOS image sensors to be introduced into a wide range ofspace applications, such as Earth observation, remote imaging, star sensor, et al.However, the space radiation formed by energetic particles and electromagneticwaves could induce functional falures, performation degradation, or even permanentdamages of CMOS image sensors. Consequently, deep insights into radiation effectson CMOS image sensors and hardness methodologies are critical for developingCMOS image sensors for space applications.This dissertation studies single event effects (SEE) and total ionizing dose (TID)effects on CMOS image sensors. The ionizing charge generated by SEE would notonly disturb functionalities of analog/digital circuits, but also corrupt pixels’ outputsignals. Besides threshold shift and leakages of n-channel transistors, TID would alsoincrease the average dark-current of photodiodes by introducing interface states at theinterface between shallow trench isolation (STI) and silicon substrate. Based on thestudies of these radiation effects above, a radiation-hardened-by-design (RHBD)CMOS image sensor is developed, which applies digital pixels as photodetectors.Layout techniques are applied to harden the photodiodes of this sensor against TIDinduced dark current increase. An RHBD standard cell library has also beendeveloped for the design of logic control part of this sensor, which supports automaticdevelopment of SEE/TID-hardened digital systems. The novelties presented in thisdissertation include:A self-checking approach for single event upset (SEU) and multi-bit upsets(MBU) tolerant finite state machines (FSMs) design based on the replication ofOne-Hot code is proposed. This method provides higher reliability than triplemodular redundancy (TMR). For example, if both this method and One-Hot codestate encoding plus TMR are applied for an FSM with16states, assuming thatone register gets upset once per100cycles on average, the proposed methodcould offer19.1times longer mean time between failures (MTBF) than thatoffered by One-Hot+TMR. When two types of state-reformed solutions of thismethod are applied, the MTBF can further reach40.3and63.2times longercompared to One-Hot+TMR. An SEU-hardened latch with a triple-interlocked structure is proposed. This latchhas the ability to recover from a single event transient at any single internal node.Guard-gates are applied to construct the internal RHBD structure. This proposedlatch could shorten the period of floating status caused by SEE, which enhancesthe crosstalk robustness of this design.Guard drains (GDs) are proposed to be inserted between adjacent pixels tosuppress SEE charge spread. The effectiveness of this method can be improvedby inserting more GDs, making their junctions deeper, and applying higherreverse-bias voltages. The results of device simulations support the conclusionsabove.