Research On Reconfigurable Technology Based On Evolvable Hardware

Large-scale applications of different user s business makes the existing network can notadapt to the increasingly prominent and underlying hardware support is overwhelmed. We needto explore a opening expanding network system that can support increasing business, so as tosolve the malady of traditional Internet, which network transformation can only rely on theexpansion and modification and routing nodes can not achieve smooth upgrade. The FlexibleReconfigurable Network System is a new network system, which has the capability of smoothupgrade and reconfiguration in recent years. Therefore, reconfigurable routing switchingplatform is the key to realize the demands of different user s business with FlexibleReconfigurable Network System. In order to realize QoS demands for different user s business,we must focus on the reconfigurable abilities of a the series of hardware component onreconfigurable routing switching platform. This thesis used evolvable hardware as the carrier,genetic algorithm as the tool of combinatorial optimizing and global searching to study hardwarereconfigurable technology of reconfigurable routing switching platform. This hardwarereconfigurable method of simulating biological evolution not only can solve the demand ofunderlying hardware support for the diversity of network business, but also save the cost ofnetwork upgrade. This approach is consistent with the needs of today’s green network andlow-carbon economy. In short, main work and contributions of this thesis are outlined as follows:1. Aiming at evolutionary method of reconfigurable hardware circuit based on bitstream, thisthesis proposed a Planar Mapped Bitstream Increments Hardware Coding(PMBIHC) method onLUT-structured SRAM-FPGA platform. Proposed an Modified Differential GeneticAlgorithm(MDGA) on this basis. Simulation results showed that MDGA improved local optimaldeficiency of typical Differential Genetic Algorithm(DGA), and could effectively improve theconvergence speed and hardware dynamic reconfigurable efficiency.2. Aiming at evolutionary method of reconfigurable hardware circuit based on HardwareElement Component(HEC)，this thesis focus on hardware circuit coding scheme. Proposedconstruction method for Hardware element component of Masking differences of underlyinghardware(HECMDUH). Proposed Chromosome coding method of Hardware element componentcoding based on genetic expression tree(HECCGET). In a more general sense, proposed asolving method for the shortest connection problem between HEC, and it could provide a newtheoretical reference for run-time reconfiguration of Hardware Element on reconfigurablerouting switching platform.3. Aiming at evolutionary method of reconfigurable hardware circuit based on Hardware Element Component(HEC)，this thesis focus on genetic algorithms of hardware circuit. Proposeda mathematical model of Optimal Hardware Construction based on ElementComponents(OHCEC). Proposed Basic Genetic Algorithm(BGA) for OHCEC problem bydesigning genetic operators. Introducing local optimization mechanism to BGA, proposedHybrid Genetic Algorithm(HGA) for OHCEC problem. Combined with local optimization, HGAgreatly improved the performance of genetic algorithm. Simulation results showed that BGA andthe HGA were all effectively, and the optimal solution of HGA outperformed BGA.4. Aiming at design methods for fitness evaluation function of evolvable hardware, this thesisproposed a Linear Transformation Scalability (LTS) Fitness Evaluatio n mode and algorithm forbitstream-circuit evolution. Proposed a Weights Borrowing and Lending Multi-objective(WBLM) Fitness Evaluation mode and algorithm for circuit evolution based on HardwareElement Component. Simulation results showed that LTS algorithm was fit for on-line FitnessEvaluation owing to its smaller evolutionary generation, absolute error and average running time.WBLM algorithm maintained the diversity and uniformity of population, and had smallerevolutionary generation and absolute error. It was fit for off-line Fitness Evaluation because oflonger algorithm average running time.5. Aiming at reconfigurable mechanism of reconfigurable routing switching platform based onHardware Component(HC), this thesis proposed a Hardware Component Abstract Model(HCAM), and described HC s functionality, performance, resource usage, and internal process indetail. In order to make the standardized HC working on reconfigurable routing switchingplatform, carried on the detailed analysis and research for Hardware Component ExploitationEnvironment(HCEE) and Hardware Component Operation Environment(HCOE). On the basis ofprevious study, proposed reconfigurable mechanism of Hardware Module(HM) and HardwareComponent(HC) based on reconfigurable routing switching platform.