Research On The Improved Channel Encoding And Decoding Algorithms With High Performance

The birth of Turbo codes and the rediscovering of low density parity check (LDPC) codes are the significant process in channel coding. The performance of the two error-correcting codes has been close to the Shannon limit, however, the high decoding complexity and large processing delay restricts the application of the two codes. Therefore proposed for channel coding techniques with high performance, low decoding complexity and latency is an important aspect for practical applications, it is also the academic community concerned about.This dissertation researches on the encoding and decoding techniques of convolutional codes, Turbo codes and LDPC codes, proposes some modified algorithms, and analyzes the performance and decoding complexity of the proposed algorithms via computer simulations. The main innovations include the following aspects.By the computation redundancy in conventional serial decoding algorithm, a modified serial decoding algorithm for LDPC codes is proposed. Unlike conventional approaches, this algorithm calculates the sum of variable-to-check messages only once at the initialization stage, and then updates it by simple recursions during the decoding stage. Compared with the conventional serial LDPC decoding algorithm, the proposed algorithm has lower computational complexity and faster processing speed without any performance deterioration.A type of hybrid decoding (HD) algorithm for convolutional codes is proposed. HD algorithm can be implemented by using two-stage decoding, where the first stage uses the belief propagation (BP) algorithm, while the second stage uses the modified Viterbi decoding (MVD) algorithm. In moderate-to-high signal-to-noise ratio (SNR), BP pre-decoder corrects most of the errors in received sequence, the remaining few errors can be further corrected by MVD. Simulations show that compared with the conventional Viterbi decoding algorithm, the proposed algorithm has a little performance deterioration with much lower average complexity in moderate-to-high SNR.According to the concept of extended tail biting recursive systematic convolutional (ETB-RSC) codes, a high paralleled tail biting Turbo code (HP-TBTC) structure is proposed for large frame transmission. The best idea of HP-TBTC is that the source/received bit sequence can be divided into several sub-streams at the transmitter/receiver, which can be can be encoded/decoded simultaneously. HP-TBTC can be implemented in parallel to obtain much higher encoding and decoding speed at the cost of more hardware resource. Simulations show the performance of HP-TBTC is better than that of the tail biting Turbo codes at the appropriate SNR.A type of Turbo-like code (TLC) for short frame transmission is proposed. The component encoder of TLC is feed-forward systematic convolutional (FSC) code designed without 4-cycles, while the associated component decoder uses serial belief propagation rule. Simulations show that TLC outperforms Turbo coding when the frame sizes are less than a threshold. Moreover, compared with Turbo coding, TLC has far less power consumption and decoding complexity in the medium-to-high SNR region.