Methodology Of The Structural Behavioral Modeling For Analog Circuits Based On Hammerstein Method

The great improvement of the integration density and design ability of integrated circuits advances the development of mixed-signal SoC, which brings along larger-scale and more complex analog circuits. The problems of testability, design automation and reliability haunting around analog circuits design reduce the design efficiency of mixed-signal SoC and analog circuit systems. Especially in complex mixed-signal systems, the deficiency and unreliability of the analog blocks often ruins the whole system and incurs redesign, which seriously cumbers the development of mixed-signal SoC. To get out of this dilemma, top-down design methodology is widely adopted, because it improves the design efficiency and reduces redesign possibility through high-level structure optimization and system-level verification. Therefore, we proposed a top-down design methodology for analog circuits based on high-level modeling in this thesis, aiming at providing system-level guidance for the design of complex analog circuits.Firstly, in consideration of the fact that the key of high-level analog circuit design is to build a high-level model for it, this thesis proposed a structural behavioral modeling methodology for analog systems based on Hammerstein model. This methodology has the following characteristics: (1) Any analog circuit can be partitioned into equivalent network consisting of sources, amplifiers, switches, impedance and some other basic units, which is hereby defined as analog circuit SASI structure; (2) Each amplifier in SASI structure is modeled as a Hammerstein macro module; (3) Each unit in SASI structure is behaviorally modeled in hardware describing language; (4) The network of the whole analog system is built according to the topology of the SASI structure and in combination of the behavioral model of each unit and it can support simulation in Spice-like simulator. Models built according to the proposed methodology have the following features: (1) The high-level model is parameterized and many original design parameters of the basic components are directly used as system-level parameters, so the high-level models built here have some universality; (2) Every component has its own behavioral model which supports all kinds of analog simulation, so the system model supports high-level simulation, verification and optimization; (3) The structural partition of the system model benefits the transistor-level circuit design; (4) The model built according to the proposed methodology for specific transistor-level analog circuit is accurate enough.Secondly, on the basis of the above modeling methodology and high-level model, the critical part of the high-level top-down design of analog circuits is to determine the parameters of the SASI structural behavioral model based on Hammerstein model. The complete top-down design procedure includes: (1) Structural partition of analog circuit, in which the whole system is partitioned into sub-functional modules, and then each sub-functional module is partitioned into SASI structure; (2) Building the SASI structural behavioral model of each sub-functional module based on Hammerstein model; (3) Top-down design specification mapping, in which the high-level specification is firstly mapped to the sub-modules, and then the sub-module specifications are mapped to the SASI units, therefore, the specifications of the sub-modules replaced the corresponding original model parameters; (4) SASI structural behavioral model is in fact too complex for analog circuit analysis and design, to overcome this problem, this thesis proposed analog circuit sub-module deconstruction method and analog system reconstructure method. Using these methods, simpler functional model, dynamic model, noise model, input-output response model and so on can be achieved, which provides a convenient way to set the behavioral constraints during the top-down synthesis procedure of the design specification.Thirdly, this thesis proposed a design optimization method based on the high-level models of sub-circuits for the performance of sub-circuits or basic analog units determines the performance of the whole analog system. In consideration of the fact that the performance characteristics of an analog sub-module are much fewer than its design parameters, we proposed a design methodology based on sub-module performance constraints. This methodology has the following features: (1) Behavioral model of sub-module circuit is built; (2) Performance constraints are set up according to the design goals; (3) Optimization goals are then determined and the optimum solution can be achieved using certain mathematical or automatic algorithm. According to this methodology, a digital-programmable OTA-C band-pass filter is designed. To improve the linearity of sub-circuits, a function reconstruction method based on the nonlinear static model of sub-circuits is summarized and then a wide-swing two-stage common-mode sampling circuit for CMFB Op-Amps is proposed. The analysis result of behavioral model shows that it is applicable to use linear planning technique to eliminate the influence of parameter variation on certain circuit performance, which gives guidance to the design of a wide-range temperature-compensated current reference.Finally, an infrared remote-control receiver is designed according to the proposed high-level design methodology. After building up the SASI structural behavioral model of the infrared remote-control receiver, its receiving sensitivity, ASK-modulated signal demodulation ability, noise performance and reliability are optimized using high-level optimization method, which determines the model parameters of the SASI structural behavioral model, and then the transistor-level circuit of the receiver is accomplished under the guidance of those parameters. The test result of the optimized receiver chip implemented in CSMC 0.6μm mixed-signal CMOS technology shows that the receiver's effective receiving range is 20m, and the current consumption of power supply is 0.73mA, which can grossly meet the low power, long receiving range requirements of common domestic electronic devices.