Research And Simulation On The Key Technology For Read/Write Channel Of Hard Disk

According to the technology trend of modern Hard disk, the technologies of magnetic head, disk medium, interface between head and disk have made significant progress, also have adequate development of space in the future. Even there are some difficults, the developing direction and elementalstudies have been basically decided. Along with these technology changes, a neccesory requirement is to meet internal data transforming rate which maybe more than 10Gb/s, and control the bit error rate to acceptable range. Now whether the read/write channel or controller, detector can not reach the skills to process such high-speed data transforming. Moreover because of fast upgrading of thecnologies and expensive development costs of ASIC, the reseach and development of simulation method about read/write channel has important ignificance.How to deal with the intersymbol interference and interference between tracks, to extract weak signals from all kinds of noise, and to high-speed regenerate the original data, are the questions which need to cooperating solute by read/write channel and encoder or decoder.The Read/Write channel integrates advanced analog and digital filter technologies, is a core technology and indispensable to modern hard disk. After introducing several models of read/write channel and technology trends at domestic and abroad, it can be seen that the reseach about grahic simulation of read/write channel can support key foundation studing platform to magnetic industry in our country.Instroducing the structure and principle of read/write channel, respectively descripting encoding/decoding process, partial response, adaptive equalization and maximum likelihood viterbi detection algorithm according to data stream. Aimed to reduce color noise in channel that damages the preconditions of viterbi detector, an embedded noise prediction algorithm in viterbi detection is proposed. Giving the computing method of waveform autocorrelation coefficients, and deriving noise sequence autocorrelation coefficients, furthermore introducing the discrete time characteristics of PR4, EPR4 and high level partial response form such as NPR under the different storage densities, and descript their trellis structures. Afterthat the post processing method using PR4 pipeline struct to auxiliarily parse EPR4 channel is discussed. Based on the block RLL coding scheme, the distribution characteristic of input codewords and Amdahl's low in computer architecture, a high rating RLL coding scheme which could be used in read/write channel is proposed, and a set of rules to queue flag sub-blocks as well as strategies to map non-conflict sub-blocks is established. This high rating RLL coding scheme made of rules and strategies can not only meet reasonable coding rate limitation, but also can be recursively used to design higher code rating RLL coding scheme such as 128/129 or 256/257, moreover can be simplily implemented by Verilog/VHDL language. A 32/33(d=0, k=6) high rating RLLencoder with ModelSim software is simulated. It can be seen from the experiment results that the real code rate designed with this scheme has little difference with theoretical code rate, and increasing with parameter k, the code rate can approximate to theoretical limitation of code rate due to tolerance longer codeword.Furthermore the possible error propagation that maybe happen in the process of RLL decoding is analyzed, and a field transforming method to implement the ECC/RLL permuted coding sheme is proposed, also its principle of this scheme is explained. Combined with high rating coding scheme and 10 bits machinery word, an ECC/RLL permuted coding scheme mixed with HRRLL, LRRLL and RS code is proposed. This sheme can be used to contain error propagation, decrease the length of burst errors and acquire better performance and lower BER.A graphic simulation model of read/write channel of hard disk based on MATLAB Simulink has been designed to observe each module's characteristic and all kinds of changes caused by modifying channel parameters. A block convolution method is proposed to design a Lorentz arbitrary waveform generator under different storage densities. To contain the DC component and noise, the frequency spectrum of servo signals is analyzed, a baseline correction filter and a continuous time filter are designed, a technique of VGA threshold judgement and a grident generation algorithm are proposed, the stable time of AGC gain is set, also an adaptive FIR equalizer to reshape the input waveform is designed. Because color noise would impact the precondition of viterbi algorithm, a FIR white noise predictive filter is proposed to contain it, furthermore a soft-decision viterbi detector model embedded noise prediction algorithm is developed. The reasons of error events in the process of detection and post-processing method that dectect EPRML channel symbols just with PRML channel trellis are all discussed. According to the characteristic of graycode in the sector mark field of servo signals, a simple and convenient method to judge the validity of our simulation model is proposed. With this simulation model, three kinds of input sequences, specified sequence, random sequence and derived actual hard disk signal sequence are compared. The experiment shows that the model can deal with three kinds of input sequences, and analyze the performance of channel when import different noise according to compare bit error rate. The amplitude-frequency response graph of 4-tap FIR predictor and 20-tap FIR predictor both embedded noise predictive algorithm is descripted. When setup SNR parameter of AWGN module from 5 to 12, measuring BER under different algorithm as the number of error symbols reach to 10, it can be seen from the results that the BER decrease with various degrees after whitening color noise and residual interference in the output signals of equalizer. When BER is near 10-4, and tap's number of FIR predictor is set to 1, channel's SNR can improve 1dB than PRML. When tap's number of FIR predictor is set to 4, the improvement is much more obvious, about 2dB. As for SNR becoming 12, BER descend according to the number of class along with the tap's number of FIR, and channel's performance achieves obvious improvement.