High Voltage Drive IC Based On High And Low Voltage Compatible Process

High voltage power IC is one of the key areas of power electronics. The high voltage power IC allows for the integration of high voltage power devices, control and protection circuits. Since the high voltage power IC reduces the number of system components, interconnection and solder points, it has not only improved system reliability and stability, but also reduced its size, weight and cost. It is of great significance for the miniaturization, intelligence, energy saving of military and civilian equipment. The isolation technology is the basis, the high and low voltage compatible process is very important, and the integrated high voltage power devices are the core to the monolithic power integration technology. For this reason, many scholars at home and abroad have proposed a series of integrated high voltage power devices and isolation technology on bulk silicon and SOI (Silicon On Insulator). The devices and isolation technology are used for high and low voltage compatible process to meet the requirements of different application areas. However, due to the limit of vertical breakdown voltage of lateral SOI high voltage device, there is no any practical 1000 V SOI high voltage IC. Since punch-through breakdown induced by thin layer SOI back-gate effect, the thickness of the top silicon is at least 1.5μm for the existing over 100 V thin layer SOI process. The thick epitaxial Si-based high voltage BCD (Bipolar CMOS DMOS) process has several drawbacks. The long diffusion times result in wider isolation diffusion. The greater lateral diffusion reduces the amount of useful area on a chip. Another important problem for the Si-based high voltage BCD process is HVI (High Voltage Interconnection) metal line extended form the drain contact of DMOS (Double-diffused MOSFET).This dissertation focuses on breakdown voltage and back-gate effect of SOI high voltage device, HVI technology, and BCD process. A novel field-control REBULF (REduced BULk Field) model for SOI high voltage device, an IFO (Implantation after Field Oxide) technology for SOI high voltage device and a NFFP (No Floating Field Plate) HVI structure are proposed. Based on the proposed model, technology, and structure, we develop a PDP (Plasma Display Panel) data drive IC, a military high voltage high current control circuit, and a series of high voltage half bridge drive ICs. The high voltage high current control circuit has already been used in a military installation, and the high voltage half bridge drive IC products are available in the market. The three main results are as follows.1. A novel field-control REBULF model is proposed for improving the vertical breakdown voltage of lateral SOI high voltage device. The mechanism of the improved breakdown characteristics is that the electric field distributions of the active region are modulated by back-gate field-control effect. The bulk electric field at the drain side is reduced, the bulk electric field at the source side is increased, and the breakdown voltage of the lateral SOI high voltage device is improved. The impact of the back-gate bias on over 600 V lateral thick layer SOI high voltage device is discussed via numerical simulations. When the back-gate bias is 330V, the breakdown voltage of the field-control REBULF LDMOS (Lateral Double-diffused MOSFET) is 1020V, which is 47.8% greater than that of a conventional LDMOS. The novel model presents a new method for realizing SOI high voltage power device and high voltage IC.2. A novel IFO technology is proposed for high side thick gate oxide device to avoid punch-through breakdown induced by thin layer SOI back-gate effect. The technology includes a criterion of the punch-through breakdown and an implantation process for precise control of the punch-through breakdown voltage. Based on the proposed IFO technology and the conforming technology of isolation and oxidation, we develop a new thin layer SOI high and low voltage compatible process, which offers NLDMOS (N-channel Lateral Double-diffused MOSFET), PLDMOS (P-channel Lateral Double-diffused MOSFET) and 5 V CMOS devices. The thickness of the top silicon is decreased from 1.5μm to 1μm for the existing over 100 V thin layer SOI process. The thin layer SOI high voltage and low voltage compatible process based on IFO technology is successfully used for a 64-bit PDP data drive IC and a military high voltage high current control circuit. The operating voltage and output current of the PDP data drive IC are 80 V and 20 mA, respectively. The operating voltage and output current of the high voltage high current control circuit are 120 V and 100 mA, respectively. The high voltage high current control circuit has already been used in a military installation.3. A NFFP HVI structure is proposed to improve the breakdown characteristics of the high voltage device with HVI. An analytical model for the surface potential and electric field distribution of the single RESURF (Reduced SURface Field) device with HVI is presented by solving two-dimensional Poisson equation. Using the effects of junction termination extension of the p-top layer and the curvature of a circular structure, the breakdown voltage of the lateral high voltage device with HVI is improved by spreading the depletion region. Two- and three-dimensional simulation results are presented. The breakdown voltage of the LDMOS with HVI is not exact in the two-dimensional simulation. In agreement with the three-dimensional simulation, the experimental results show that the breakdown voltage of the LDMOS, which depends strongly on the concentration of the p-top layer, will increase with the reduction of the width of the HVI. Based on the proposed NFFP HVI structure and the developed thin epitaxial high voltage BCD process, an 880 V half bridge drive IC is successfully realized. The high voltage half bridge drive IC products are available for civilian areas.