Communications In Networks-on-Chip

With the fast developing of semiconductor technology, IP reuse has become a driving force of the integrated-circuits industries. As the complexity of integrated circuits further increases, IP reuse technology has also been borrowed to the design of system and communication architecture to improve their performances. Furthermore, IP reuse has been expaed to system reuse methodology. The structure of multi-processor networks-on-chip is an example of the evolution from IP reuse to system reuse. In network-on-chip, the communication performance between multiple sub-systems is one of the most important infecting factors for the whole system' s performance.The author has worked in the system-level-synthesis group of TIMA Laboratory doing research on improvement strategies for the performance of communication between multi-core systems. Based on the research background in TIMA, the author has made innovative researches and the mainly results are described as following:1. Using the characters of distributed memory server to improve communication efficiency in NoC systems.Considering the fact that the communication between multiple sub-systems in Simulink-based multiprocessor design flow is not efficient, the author integrated distributed memory server (DMS) into the design flow. The arbitration and buffer mechanism inside DMS are utilized to achieve the objective of improving the communication efficiency between multiple systems. After the validation for Motion-JPEG decoder experiments, the results showed that systems using DMS as memory server decreased the execution time for decoding 10-frame JPEG stream by 45%. Inside the subsystems, from the ratio of communication cost cycles to total execution cycles perspective, the architecture integrated with DMS decreased the communication percentage of total execution time by 45%-64%. 2. Function mapping method with considering communication costs and partition in design exploration to relieve communication congestion for global systems.Mathematical models are built on the basis of task mapping method in NoC. The communication congestions between multiple nodes are utilized as mapping parameters, so that the communication has been integrated in the task mapping process in the early stage of design exploration. Furthermore, communication monitor unit (CMU) was inserted in the nodes which are still not satisfied by the bandwidth constraint. And CMU' s throughput monitor and routing regulating features are utilized to relieve the traffic between congestion nodes. According to the experiments results in H.264 decoder, after inserting CMU, the communication efficiency of congestion nodes increased by 20%.3. Integrated security virtual-channel and path validation to protect NoC communication performance from different attacks.In order to protect the data transferred between different systems, explorations were made on the security protection in NoC. First, the author inserted security virtual channel to prevent network congestions caused by attacks of bandwidth denial; Second, en/decryption logic was inserted in network interface, so that sensitive data are protected from data extraction; finally, self-complementary path validation method was inserted, so that authorized read/write operation is achieved, and sensitive information in the subsystems are protected from attacking.