Area-Optimized Design And Implementation Of JavaCard Processor

JavaCard is the next generation standard of smart card, and has been used widely. At present, most of the JavaCard systems are implemented by software. System software itself has taken lots of resources, can not execute JavaCard programs efficiently, and can not be used in the applications that require special features,for example,fast encryption and decryption. Implementing JavaCard processor in hardware can solve these questions.We researched many Java processor designs and analyzed the characteristic which the JavaCard device is extremely resource-constrained, then we proposed the design objectives of AOJCP(Area-Optimized JavaCard Processor):smaller chip size,low power consumption,optional hardware AES encryption and decryption ,and designed to be a wishbone compatible IP core.AOJCP is completely independent design. This dissertation described design decisions made to achieve the design objectives, also described the microcode processor overall architecture, microcode design that unified single-cycle and control-acknowledge mechanism,data structure and memory model based on memory pointer, FPGA implementation result of AOJCP, and described how to integrate a 128bit AES hardware encryption-decryption module(AESCORE) to extend AOJCP's function.The main contributions of the dissertation are summarized as follows:1. Got a microcode based, area optimized,low power consumption JavaCard processor IP core, the implementation result in Xilinx XC2S400e FPGA chip: 1410 LCs(about 16K gates)+ 23 BlockRAMs, the highest estimated frequency is 36.2MHz,and the power consumption is 124mW.2. microcode design unified single-cycle and control-acknowledge mechanism The microcode does not need the following operand ; Immediate value wasencoded as microcode; Microcode design that unified single-cycle and...