Vertical Dual Carrier Field Effect Transistors is a novel field-effect transistor, and worked under hign-injection and voltage-controled. It's structure is identical with a bipolar junction transistor except the terminals are designed differently because the mode of operation of the transistor is a field effect transistor. The device terminals are designed as "Contact" C, "Source" S and "Drain" D. Under the mode of hign-injection, both types of carriers, i.e. electrons and holes are present, the electrical fieldd channel perpendicular to the serface of the device is formed in the contact region, the electrical field can acceelerate minority. The limit to channel length by photolithograthy technology is avoided, the channel length of the VDCFET can be achieved 0.05μm by present bipolar technology.In this dissertation, the study on Device physics and verifical experiment of VDCFET were performed.The device physics of VDCFET is studied by two-dimensional numerical simulation. The Drift-Diffusion Mode is used to describe the carrier transportation, the concentration of potential and carriers were obtained from Possion equation and Continuity equation. In the high injection region, there is a lateral voltage drop on contact region, and increased with applied Source junction voltage VCS, the effective Source junction voltage is lower than VCS, the concentration of potential and carriers in interior contact region are two-dimensional, vertical electrical field accelerate the minority . The reason of electrical field in effective contact region were analysed by high injection and two-dimensional effect. From the concentration of electrical and minority curret density, the current channel was formed. The vertical electrical field in effective contact region is increased with VCS, the proportion of drift current increased too. The characters of DC were gived out, the current gain decreased in high injection, but the transconductance increased and contact transit time decreased quickly with VCS. So in the high injection, VDCFET has a good performance of high transconductance and short contact region transit time.On the base of the study on device physics of VDCFET, we studied the effect on electrical characteristic of device caused by structure parameter of contact region and drain region, including the width of contact regeion Lx, the distribution of impurity concentration and outside contact region size Lz, then optimized structure parameter of VDCFET. From the result, we can conclude: transconductance can not be improved by narrowing the contact region, otherwise, transconductance and current gain can be improved by... |