Study On Embedded Reconfigurable Computing System And The Tasks Scheduling Algorithm

With an increasing requirement for the computing performance in the complex application, single microprocessor is no longer capable of satisfying mass data processing. It is indispensable to establish a high-speed, reliable computing system. At present, a key solution to high performance computing is reconfigurable computing, which embeds the reconfigurable hardware and micro-processor into a system, so as to integrate the advantages of both general microprocessor and ASIC (Application Specific Integrated Circuit) to achieve the software flexibility and hardware optimization.Reconfigurable hardware unit is the kernel element of the reconfigurable computing system, which could be configured into diverse hardware logic to achieve multiple functions and applications. Overseas researchers have carried out plenty of work on reconfigurable computing, and some have been successfully applied in practice. In their research, two types of reconfigurable hardware are employed. One is specific FPGA (Field Programmable Gate Array) for the reconfigurable system; the other is the chip developed peculiarly for reconfigurable computing research. However, we are not provided with these and the domestic study is still in a learning stage in this field at present. Under this situation, an embedded reconfigurable parallel computing system was designed and implemented and some relative theories were studied.In this paper, some aspects on reconfigurable computing were analysed in terms of characteristics, history of development and applications. The reconfigurable computing classified by the unit granularity, coupling pitch, configurable capacity, compiling and reconfiguration mode were also discussed, respectively. Then the key technologies of the reconfigurable computing were studied, involving model structure, compiling, quick reconfiguration, chip integration and tasks scheduling. Making some trade-off between...