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Design And Implementation Of Hardware-Software Co-design Of A Platform-Based SoPC

Posted on:2007-12-31Degree:DoctorType:Dissertation
Country:ChinaCandidate:F J JianFull Text:PDF
GTID:1118360185454190Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
SAR, Synthetic Aperture Radar, real time imaging is a matching filtering process of both range and azimuth directions. It is an important tool for the collection of high-resolution, all-weather, all-time, huge area image data. It is widely used in the fields of military, economy and environment. Real time SAR imaging is typically very complex, which requires high capacity data storage and processing ability. SoPC, System on a Programmable Chip, is a kind of SoC on the basis of PLD, Programmable Logic Device. SoPC is a feasible platform for real time SAR imaging. Platform is an integrated software-hardware structure. PBD, Platform-Based Design, becomes an uprising important method of SoPC design. Hardware-software co-design is a key technology of PBD SoPC.Combining the application of Real time SAR imaging Chirp Scaling system, hardware-software co-design is researched deeply on the basis of PBD SoPC, including system design model, platform develop, algorithm design, prototype simulation, system implementation, performance optimization and system evaluation etc.The research contents of this dissertation are as following:MCPGM, Multi-Constrain Process Graph Model, is proposed as a system design model, combining hardware-software co-design on PBD SoPC. Compared with PGM, MCPGM adds virtual process and surplus constrains. The former is used to describe communication between hardware and software and the later is designed for SoPC realization and expandablity. Moreover, software-hardware partitioning of MCPGM is discussed. MCPGM has favorable platform description capabilities and is suit to describe application requirement of high performance SoPC system.MBSoPC, Multi-bus System on a Programmable Chip, is designed and implemented. It improves valid bandwidth of both input and output. It is suit for high performance digital signal processing. Some key technologies of MBSoPC are deeply researched, including high performance asynchronous bus2bus bridge, design for verification FSM, and dynamic balance...
Keywords/Search Tags:System on a Programmable Chip, MCPGM, MBSoPC, SAR, Chirp Scaling Factor
PDF Full Text Request
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