On Ethernet-Like Physical Frame Time-Slot Switching

IP network can not meet the requirement of high-speed integrated services, because IP network has too many layers in User-data Plane to be efficient and is difficult to guarantee Quality of Service (QoS). Although several QoS guarantee mechanisms, such as Differentiated Service, Integrated Service, and MPLS are proposed based on IP network, so far they are not so successful. This has spurred the activity of developing the SUPANET (Single User data Platform Architecture Network) at Sichuan Network Communication Technologies key Laboratory.This thesis is dedicated to a novel switching technique in the user-data transfer platform in the SUPANET, called the Ethernet-like Physical Frame Timeslot Switching (EPFTS). A comprehensive study on EPFTS and its key techniques is provided in this dissertation. EPFTS provides a high efficient switching platform with enough mechanisms for providing required QoS.This dissertation started with a comprehensive study on switching techniques and switches to analyze the challenges faced with future high-speed switches and key techniques needed for further study. A concept model for switches with the out-band signaling concept is introduced to enable an in-depth understanding of the internal organization of a switch. To pin down the key points in a switch, which could improve the performance of a switch, a virtual concatenated-pipe model is introduced, which has led to a novel switching concept called Half-step Forward Switching (HFS).Queuing issues and scheduling algorithms have been given a high priority in author's study of switching techniques considering that they are important not only in Input and Output units, but also in switch fabric for arbitrations. Three switch models, i.e. Output Queue Switch, Input Queue Switch and Combined Input & Output Switch, are analyzed. In view of the disadvanges of the typical scheduling algorithms, three new/improved scheduling algorithms are proposed. Table looking-up can also affect the performance of a switch. The typical table looking-up algorithms are analyzed. Table looking-up algorithm based on hardware is designed based on the fix length of index field in EPFTS and fastlooking-up algorighm for Burst is proposed in this thesis.The chief contributions of this thesis are as follows:First, the architecture of Switch/Router is analysed by "virtual concatenated-pipe model", which is helpful to find the bottlenecks of Switch/Router. For the first time, this dissertation started with a comprehensive study on the EPFTS techniques and the framework of EPFTS is given, which includes the definition of the EPF frame format, QoS guarantee mechanism, queue scheduling and Half-step Forward Switching in EPFTS.Second, three new/improved scheduling algorithms have been proposed to cope with different application environments. A novel Borrow & Return Weighted Round Robin (BR-WRR) scheduling algorithm is introduced to ensure that the required QoS can be satisfied in case of bursting. An improved DWRR (IDWRR) scheduling algorithm is recommended to cope with QoS problems with lower priorities. For the scheduling algorithms of the CIOQ (Combined Input & Output Queue) switch architecture, a new scheduling algorithm based on buffered Crossbar is proposed in this dissertation and it is concluded that the CIOQ switch can mimic that OQ switch if the speed-up factor is no less than 3 in this scheduling algorithm.Third, the implementation of table looking-up is given according to the fixed length of the index of VLII in EPFTS. And a fast looking-up algorighm for Burst is proposed. Looking-up time is short and length-fixed enough to meet the requiremen of high-speed switching.Fourth, a new switching technique called Half-step Forward Switching (HFS) is proposed. HFS can change the centralized processing in input ports of conventional switches to distributionally processing, which can reduce the block in input ports and enhance the performance of switches...