Etched-Diffraction-Grating Based Planar Optical Multi/Demultiplexer On Silicon-On-Insulator

Silicon-on-Insulator (SOI), boasting good optical, electronic and mechanical properties, is one of the common materials of Integrated Planar-Lightwave-Circuits (PLCs). When it is used for PLCs, it has following advantages: fabrication process is compatible with 1C, low cost, high reliability and ability of volume production.Multi/Demultiplexer (MUX/DEMUX) is the key device in DWDM system and the optical network which has wavelength-selective functions. Etched-Diffraction-Grating (EDG) is a kind of MUX/DEMUX with compact structure, good performance, and high reliability. Therefore, it is very necessary to study MUX/DEMUX on SOI material.Etching vertical and smooth grating facet is the basic of the fabrication of EDG. In this thesis, etched walls with verticality of better than 89?and Root-mean-Square (RMS) surface roughness of below 10 nm are achieved by using non-switched Inductivity Coupled Plasma (ICP) etching technique. By optimizing the layout of grating and the process, the Lag and Notch effect of ICP etching technique are minimized.Multimode in the multimode-slab waveguide excitated by the non-vertical grating facet was numerical simulated and calculated in theory with the mode overlapping method. Weighted-Mode-Overlapping method is used for the first time to calculate the coupling coefficient between the ridge waveguide and the multimode slab waveguide. Calculation of the coefficient based on optical confinement factor is also introduced. Based on these analyses, the influences on insertion loss and crosstalk of the waveguide structure and the process error were presented for the first time.The Integrated-Waveguide-Turning-Mirror (IWTM) can change the direction of optical waveguide in small area. It is very useful to reduce the chip area of PLCs. IWTM on SOI with large cross-section single mode ridge waveguide is design and fabricated for the first time. Methods including ICP dry etching method, anisotropic wet etching method and two-step method are studied systematically. The losses of KOH etched IWTM and ICP dry etched IWTM are 1.48dB/mirror and 1.7-1.9dB/mirror, respectively.Compact EDG with IWTM and normal EDG on SOI were design, fabricated and tested. The minimum on-chip loss is below 5dB, the minimum crosstalk is about 22dB.The Polarization Dependent Loss (PDL) is better than 0.5dB. The Polarization Dependent Central Wavelength shift (PDCW) is about 0.08nm-0.13nm when the thickness of device layer of SOI wafer is 5(^m. Flattened spectrum is also achieved by using the Multimode Interference (MMI) structure at the input waveguide. IdB and 3dB bandwidth are 0.64nm (79GHz) andO.SVnm (lOSGHz) respectively.In our experiments, the loss comes mainly from the unperfected photolithography and the crosstalk is limited by the stitching error during the generation of photo-mask. By using state-of-the-art photolithography technique, uniform SOI material and optimized etching process, EDG on SOI is expected to be a competitive choice compared with those on other materials, such as InP and Silica, or Arrayed-Waveguide-Grating (AWG).