Study On Small Molecular Weight Organic And Microcrystalline Silicon Thin Film Transistors

Active matrix organic light emitting diodes are highlighted nowadays in the research of a new generation of flat panel display. As a core component of AM-OLED, thin film transistor (TFT) appears to be the most attractive. According to the active layer, thin film transistors can be divided into two groups: organic TFT and inorganic TFT. Organic thin film transistors (OTFTs) have received considerable attention because of their characteristics of simple process, low cost, and large area preparation. However, it is still a prototype in the lab stage. Amorphous silicon thin film transistors (a-Si TFTs) with a well known process are difficult to meet the requirements of AM-OLED due to its low mobility. However, compared with a-Si TFTs, microcrystalline silicon thin film transistors (μc-Si TFTs) has a relatively high field effect mobility, which can drive the OTFT. Moreover, the fabrication process ofμc-Si TFTs is very similar with those of a-Si TFT. In this dissertation, these two types of devices are studied and the results are listed as follows:1. Contact resistance is a key factor in improving the performance of organic thin film transistors. How to reduce the contact resistance of OTFT is a hot topic of current research. We mainly focus on enhancing the performance of OTFT through improvement of contact between source/drain electrode and organic active layer. The contact resistance was calculated by the transmission line method (TLM). The ways to reduce the contact resistance of OTFTs are as follows: (1) Improving pentacene-TFT performance through contact-area-limited doping with tetrafluorotetracyano-quinodimethane (F₄-TCNQ) and MoO_x. When 2 wt% F₄-TCNQ and 55 wt% MoO_x doped pentacene film were inserted into Au and pentacene, the field effect mobility were improved by a factor of 2 times and 1.1 times, respectively. (2) Reducing the contact resistance of pentacene-TFTs by replacing Au source/drain electrode with WO3/Au source/drain electrode, the field effect mobility were improved by a factor of 7 times (3) For the bottom contact copper-phthalocyanine (CuPc) thin film transistor, reducing the contact resistance by using UV/ozone treated Au as source/drain electrode, the mobility was increased from 4.69×10-3 to 2.37×10^-2 cm²/V s (4) Reducing the contact resistance by MoO_x modified low cost copper as source/drain electrode, the mobility of pentacene-TFT was increased from0.13 to 0.61 cm²/V s2. To achieve the large-area, low-cost, high performance organic thin film transistors, we fabricated pentacene-TFT with plasma enhanced chemical vapor deposition (PECVD) SiN_x and SiO_x insulator and the low-cost copper electrode. We fabricated different SiN_x insulators at different deposition temperature and prepared different SiO_x insulators at different ratio of SiH₄ to N₂O (SiH₄/N₂O) by PECVD. Then, we fabricated the pentacene-TFT based on these insulators and investigated the effect of dielectric constant, surface morphology and electric breakdown of insulator on the device properties of pentacene-TFTs with a low-cost copper source/drain electrode. The results indicate that pentacene-TFT with SiN_x insulator at deposition temperature of 300℃, exhibited the highest saturation mobility of 0.29 cm²/V s and the lowest threshold voltage of -8.9 V. Pentacene-TFT with SiO_x insulator at SiH₄:NH3 gas flow ratio of 1:7, showed that the highest saturation mobility of 0.26 cm²/V s and the lowest threshold voltage of -12.8 V.3. Microcrystalline silicon has a direct influence on the performance of microcrystalline silicon thin film transistor. To prepare the high quality microcrystalline silicon, we studied the effect of process parameters (ie. hydrogen dilution, deposition temperature, chamber pressure and power density) on the crystalline fraction and deposition rate of microcrystalline. The result suggests that the high quality microcrystalline silicon thin film was prepared with optimized process parameters. The results indicate that the microcrystalline silicon film shows the highest crystalline volume fraction of 76.4% at a deposition temperature of 300℃, hydrogen dilution of 99%, chamber pressure of 80Pa, and power density of 0.6 mW/cm².4. The n+-doped-layer-free microcrystalline silicon thin film transistor (μc-Si TFT) can avoid using the toxic PH3 gas and omit the n+μc-Si etching process, which will decrease the fabrication cost and complexity. A n+-doped-layer-freeμc-Si TFT with A novel source/drain electrode (ie. Al-alloy and Al/LiF) was fabricated and investigated. (1) For the n+-doped-layer-free microcrystalline silicon thin film transistor with Al alloy as the source/drain electrode, the mobility measured in the linear regime was found to the roughly similar to that calculated in the saturation regime. The behavior suggests a good contact property between the Al alloy and the microcrystalline silicon film. (2) For the n+-doped-layer-free microcrystalline silicon thin film transistor with Al/LiF bilayer film as the source/drain electrode, the electron-injection barrier was calculated with physical mode. The result indicated that the electron-injection barrier between Al/LiF and silicon (0.12 eV) is smaller than that between Al and silicon (0.512 eV), which verified the fact that the performance of n+-doped-layer-freeμc-Si TFT with Al/LiF bilayer electrode is better than that with Al electrode. The result indicated that Al-alloy film and Al/LiF bilayer film as the source/drain could replace the n+-doped layer in aμc-Si TFT.5. The ratio of width to length (W/L) of switching TFT (T1) and driving TFT (T2) are designed by simulation and fixed to be 40μm/8μm and 50μm/8μm,respectively. A 7-inch microcrystalline silicon (μc-Si) thin-film transistor (TFT) array, as an active-matrix organic light emitting diode display (AMOLED) back plane, was fabricated and investigated by the metallurgical microscope and scanning electron microscopy.