Research On Joint Stochastic Decoding Algorithms Of Concatenated BCH-LDPC Codes

Concatenated code is an important type of error correction coding scheme,which has stronger error correction ability and can obtain better decoding performance than single code coding scheme.Among the many concatenated coding schemes,the BCH-LDPC(Bose-Chaudhuri-Hocquenghem-Low Density Parity Check)concatenated code is a coding scheme with excellent decoding performance and has been applied to standards such as DVB-S2(Digital Video Broadcast-Satellite Second Generation).The existing BCH-LDPC concatenated code decoding algorithms are constructed based on the BP(Belief Propagation)decoding algorithm of LDPC codes.However,such algorithms have high complexity and cannot be implemented in parallel,and the throughput and hardware efficiency are low.With the rapid development of information technology,traditional joint decoding algorithms have been unable to meet the increasing demand for high-speed transmission in human society.Based on this,this thesis adopts new numerical characterization and calculation methods to study the fully parallel,high-throughput,low-complexity stochastic BCH-LDPC joint decoding algorithm and its implementation architecture based on stochastic computation.First of all,this thesis studies and analyzes the stochastic decoding algorithm of BCH codes,and carries out detailed theoretical analysis and simulation verification for the problem of redundant calculation of BSCA(Bit Wise Stochastic Chase Algorithm)algorithm.On this basis,this thesis proposes TBSCA(Threshold-based Bit Wise Stochastic Chase Algorithm)algorithm based on threshold judgment,and builds a simulation platform to analyze and compare the decoding performance,decoding latency and other indicators of the TBSCA algorithm.Simulation results show that TBSCA can achieve better performance than the BSCA algorithm.Secondly,this thesis focuses on the re-randomization method of variable nodes in the stochastic LDPC(Low Density Parity Check)decoding algorithm,and conducts an in-depth study on the counter-based re-randomization method and the MTFM(Majority Tracking Forecast Memory)re-randomization method.For the stochastic decoding algorithm based on the counter structure,this thesis improves its counter structure and proposes a counter structure with early overflow protection.For MTFM,this thesis simplifies the MTFM structure based on the proposed grouping multiplexing design method.On this basis,this thesis builds a simulation platform to perform the corresponding performance simulation and hardware complexity evaluation of the designed stochastic LDPC decoding algorithm.The simulation results show that the method in this thesis can improve the performance of the stochastic LDPC decoding algorithm and reduce the implementation complexity.Aiming at the fully parallel stochastic joint decoding scheme of BCH-LDPC concatenated codes,this thesis firstly analyzes the stochastic decoding schemes of BCH codes and LDPC codes,and expounds the feasibility of the stochastic joint decoding scheme.Next,corresponding theoretical analysis and simulation explanations are carried out for the generation of candidate decoding vectors,the improvement of LDPC variable nodes and the generation and feedback of additional external information in the stochastic joint decoding scheme.On this basis,this thesis proposes two types of joint stochastic decoding algorithms based on the CRC(Cyclic Redundancy Check)aided stochastic decoding algorithm and the TBSCA algorithm.The simulation results show that the stochastic joint decoding algorithm can significantly improve the throughput and hardware efficiency of the decoding system within the acceptable range of decoding performance loss.