Research On Stochastic Decoding Of Non-Binary LDPC Codes

Non-binary low density parity check(LDPC) codes were shown to perform better than equivalent bit-length binary codes in error correcting performance. Also, it can resist the burst error and suit for high-speed transmission. However, in spite of the excellent performance, with the increasing of Galois fields, non-binary LDPC codes are not in widespread use due to the high complexity. In this paper, we combine stochastic computing and sum-product algorithm(SPA) to design the stochastic decoding for LDPC codes over Galois fields. The proposed algorithm converts channel probabilities to stochastic streams, therefore, the multidimensional information between nodes transmits in the form of several bit-streams, and the place and route can be more simply than sum-product algorithm. Also, the proposed algorithm can replace complex probability operations such as division and multiplication with simple bit-serial structures to reduce the complexity. Thus we can design the fully parallel architectures to raise the clock rate and it has great significance for increase the throughput to research the algorithm.Firstly, this paper introduces encoding and decoding algorithm for LDPC over Galois fields, and compares the differences between non-binary and binary LDPC codes. Secondly, this paper designs check matrix with progressive edge growth algorithm. Then, this paper introduces the stochastic computation and reflects the properties from implementing the simple arithmetical operations. As a result, we study the non-binary LDPC stochastic decoding and design circuits for some elements. After comparing the performance between sum-product algorithm and stochastic decoding, we analyze the result. In order to solve the problem about non-convergence for stochastic decoding, we lead to “hold state”. Therefore, we proposed some project, such as noise-dependent scaling, edge memories, sub-node.In GF(16), we use the stochastic decoder for decoding an irregular(252,126) LDPC code, compared with float point SPA, the result shows that stochastic decoder only lose 0.1dB. When SNR is 3dB, and clock rate is f MHz, the throughput can reach f/ 10 Mbps. It is important to study non-binary LDPC stochastic decoder because it owns natural low complexity and match the performance of SPA.