Font Size: a A A

Research On The Implementation Of Cache Coherency Protocol In 3D Multi-core Processor Based On The Network-on-chip

Posted on:2019-08-25Degree:MasterType:Thesis
Country:ChinaCandidate:X T TongFull Text:PDF
GTID:2428330596950058Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Multi-core processor design trends and research hot spots are the 3D multi-core processor based on the Network-on-Chip(NoC),and the cache coherency protocol is the guarantee that shared data is correctly stored and read in multi-core processor systems.This thesis aims at the implementation of cache coherency protocol in 3D multi-core processor based on the NoC.Firstly,a distributed two-level directory structure of column nodes based on 3D NoC is proposed to reduce the increasing directory storage overhead of directory-based cache coherency protocol.The proposed structure divides the 3D network into multiple column nodes,and uses global and column node directory to store the distribution of the shared data copies.Compared with the conventional directory implementation method,the storage overhead of the proposed directory structure is smaller,and the cache coherency protocol based on the proposed directory structure has better access delay performance.Secondly,in view of the multicast communication features demonstrated by the cache coherency protocol,a column partitioning multicast routing algorithm named 3D_CPM is proposed.The proposed algorithm selects the appropriate contact nodes according to the columnar partition,and then uses the XYZ algorithm to realize the route transmission of the cache coherency protocol message from the source node to the contact node and then to the destination node.Furthermore,an improved multicast routing algorithm named 3D_OCPM is proposed.The proposed algorithm selects the path with the smallest number of routing hops among the nodes to achieve the purpose of making full use of the common transmission path and better realizing the multicast routing of coherence protocol message.Finally,defined the data packet format of message transmission for cache coherency protocol,and used the Noxim simulator to validate the proposed algorithms.The experimental results show that compared with the existing multicast routing algorithms,the proposed algorithms can effectively reduce the average communication latency and communication power consumption under different communication modes.
Keywords/Search Tags:3D Network-on-Chip, Chip Multi-Processors, Cache coherency protocol, multicast routing algorithm, Noxim
PDF Full Text Request
Related items