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Design Of Transmission Between FPGA And PC Based On PCIe And Gigabit Ethernet

Posted on:2015-05-31Degree:MasterType:Thesis
Country:ChinaCandidate:C J WenFull Text:PDF
GTID:2308330464966822Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
With the improvement of system performance, function and bandwidth, data throughput of high speed data collection and other data processing are increasing. Therefor the usage of new high speed interface technology to solve the bottleneck problem about bandwidth limitation and high speed transmission becomes increasingly important. FPGA has developed to be one of the main platform on digital system and widely used in many fields, such as signal processing and communication. FPGA can realize parallel processing and obtain a high speed, but FPGA is not directly appropriate for high-precision and complex operation while PC has powerful calculating and data processing capacity. Consequently, the high-precision and complex operation are accomplished by PC generally, which results in the transmission between FPGA and PC. So building a high speed data transmission system between FPGA and PC becomes a research tendency. According to the current research tendency and the actually requirement, PCIe DMA data transmission system and Gigabit Ethernet data transmission system are designed in this paper with deep research into PCIe and Gigabit Ethernet. The following works have been done in this paper:1. PCIe and Gigabit Ethernet has been deeply researched including technological superiority, the protocol and data frame form.2. PCIe DMA data transmission system has been designed. The system consists of two components, one of which is the logic module development with verilog language on FPGA and the other is the C application program development with Win Driver on PC. According to PCIe IP Core, TX and RX Engine module, the access controlling modules of register and FIFO have been realized on FPGA side. Then the interfaces of the modules above have been defined, and the data transmission timming has been analyzed. The PCIe driver has been developed by Win Driver, and the C application program has been designed according to Win Driver API functions.3. Gigabit Ethernet data transmission system has been designed. The system consists of two components, one of which is the logic module development with verilog language on FPGA and the other is the application development with Winpcap on PC.Based on the Embedded Tri-Mode Ethernet MAC wrapper on FPGA, the TX and RX Engine module, the FIFO controlling module and the physical interface module have been completed. The interfaces of the three modules above have been defined, and the data transmission timming on locallink interfaces and client interfaces has been analyzed. Using the network programming provided by Winpcap on the PC, the C application program has been finished, which realize to capture data packets from FPGA and to send data packets to FPGA.4. PCIe DMA data transmission system and Gigabit Ethernet data transmission system have passed the performance testing on Xilinx ML507 development board. According to the transmission results, the availability and stability of the two systems have been verified and analyzed.Massive data transmission between FPGA and PC has basically realized based on PCIe DMA data transmission system and Gigabit Ethernet data transmission system, which is made a certain contribution on the future relevent research.
Keywords/Search Tags:High speed interface, PCIe, Win Driver, Gigabit Ethernet, Winpcap
PDF Full Text Request
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