Design And Study Of On Chip Optical Interconnection For Multicore Processor

With the continuous development of semiconductor integrated technology, thenumber of semiconductor devices that can be integrated on a chip is becoming largerand larger. The traditional electrical interconnection network on chip has met withbottlenecks in terms of bandwidth, power consumption, latency and so on, whichseriously affects the improvement of multiprocessor system performance. Opticalinterconnection has the advantages of high bandwidth, low latency, low energyconsumption, etc. Therefore, optical network on chip (ONoC) becomes a hot researchtopic. However, with the further increasement of the number of processor cores on chip,the available on chip memory access bandwidth becomes a new bottleneck. The latencyand energy consumption increase sharply in traditional multicore processor system.Therefore, studying optical interconnection multicore processor system has greatsignificance to improve memory access efficiency and reduce memory access latency,such as what kinds of switching mechanism to be used, how to design the systemarchitecture, and so on.The on chip optical interconnection for multicore processor is studied with thefocus on how to improve memory access efficiency and increase memory accessbandwidth, thus reduce the memory access latency. First of all, we summarize theworking principle and developing situation of on chip optical device. What’s more, weelaborate the basic principle of memory system and the advantages of opticalinterconnection memory system. Then, the blocking characteristic of optical circuitswitching mechanism in ONoC is analyzed, and the communication process of thememory access using optical circuit switching mechanism is given. Furthermore, thesimulation of on chip multicore processor system using different memory managementmechanism is carried by using OPNET simulator. Through the analysis of thesimulation result, the system architecture with the best memory access efficiency isobtained. Finally, we propose a3D on chip multicore processor system using opticalinterconnection based on-router. The architecture uses TSVs inter-layer andinterconnects TSVs and MC using-router, which leads to the decrease of the latencyfrom long wires and the increasement of memory access bandwidth for multicoreprocessor. On this basis, the ETE delay and Throughput performance of the proposedarchitecture is simulated by using OPNET. From the simulation results, we can see thatthe proposed architecture has good network performance.