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High-performance, Scalable Optical Network-on-chip Architecture Designs

Posted on:2015-11-20Degree:MasterType:Thesis
Country:ChinaCandidate:K ChenFull Text:PDF
GTID:2308330464966878Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Optical networks-on-chip(ONo C) has been proposed as a promising alternative paradigm for electronic No C with the benefits of optical signaling communication such as ultra-high bandwidth, extremely low energy consumption, and negligible transmission latency. In this thesis study, a set of different ONo C architectures are presented for future on-chip communication.A new circuit-switched ONo C architecture named MRONo C(Multiple Ring-based Optical No C) is proposed to realize the objectives of ultra-low setup cost, better scalability, and contention-free communication. MRONo C utilizes WDM to introduce its basic version with efficient wavelength assignment and produces a series of potential versions by using multiple waveguides instead of some wavelengths. These potential versions can make a tradeoff between required wavelengths and waveguides to improve the scalability. All the versions eliminate communication resource contention and simplify the arbitration.Passive ONo C plays an important role as well as circuit-switched ONo C. A novel Passive OIN based on Two-layer architecture(POINT) is proposed. It is a symmetrical and scalable architecture that combines wavelength division multiplexing(WDM), space division multiplexing(SDM), and inter-layer couplers to develop a non-blocking passive optical interconnection network. It first utilizes SDM to introduce the basic building block created by re-using only one wavelength on different communication channels and then utilizes WDM to construct POINT by connecting multiple basic building blocks with efficient wavelength assignment. Basic buiding blocks of different sizes offer different options for constructing POINT of different scales.To accommodate the layout of tiles-based chip multicore processor, a torus-based passive optical network on chip architecture, TAONo C, is proposed. Depending on the unique designs of three function modules, TAONo C can still support contention free communication without the need for the arbitration. TAONo C employs comb switches instead of some general microring resonators(MRs). It has a low demand for the number of MRs because of the ultra-high utilization of resonant wavelengths owned by a single MR.
Keywords/Search Tags:Optical Network-on-Chip, Circuit-Switched Network, Passive Network, WDM, OPNET, Simulations
PDF Full Text Request
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