PACDSP CORE Oriented Multi-core Debug Controller Hardware Design And Software Validation

With the integrated circuit design and manufacturing technology development,chip design house constantly larger scale, performance requirements continue toincrease, making the single-core has been gradually replaced by multi-core softwareprogram on the design process from the serial design to multi-threaded applicationdevelopment, debugging attendant problems are becoming more complex, another chipmarket competition is becoming increasingly fierce, facing enormous pressure of timeto market and achieve a stable and efficient system needs effective hardware andsoftware debugging method becomes particularly important, how to shorten debug timeand increase the speed on shortening the SOC chip debug time to market to takedecisive importance.The main research work is geared PACDSP CORE multi-core debug controllerhardware design and software validation study. The paper describes in detail thehardware and software debug controller parts, first for the hardware inside each modulefor a detailed description, and its internal circuitry is how to achieve also made adetailed description; then part of the software breakpoints species are introduced, howto set up/removal, the use of debugging tools and their supporting command set haseleven described.This entire operation flow is from the PC on the gdb window input to support thecommand to start the software part mainly for these commands to parse, parsing iscomplete, execute the corresponding function, and then by calling the USB drive, theUSB protocol for these information transmitted to the probe on the company CYPRESSCY7C68013A chip, the chip will parse USB data and parse out the information writtenon its slave FIFO, then probe will process this information to JTAG_WRAP reflect on,Probe and then through a JTAG interface and PACDSP internal EICE circuitinformation exchange, so as to achieve the purpose of debugging PACDSP.This paper describes how the final simulation debugging there, from hardware tosoftware debugging connections are explained one by one, in which the hardware partof the required two circuit boards, in which a portion of the probe, the other one is EICEpart (besides EICE In addition, embedded with two PACDSP CORE), and there aresome how to use the software for instructions. Hardware circuit connected, the PC via gdb window, enter the command, thecommand for each of the supported debugging, can achieve the desired results.