Research Of Interconnection Of Multi-Core Processor Based On SOPC

With the increasing requirements of embedded applications, single-core processor appeared shortage and limitations in the complex function realization, the development of multi-core technology is becoming more and more attention. SOPC usually refers to a single chip by programming to realize a digital computing system, in the hardware, a single chip contains one or more microprocessors, architecture based on bus, peripheral for specific application, input and output interfaces and other resources; in the software, which contains an embedded real-time operating system and application software, using a chip compose a complete system.The system designed with SOPC has strongpoints which are small size, low power consumption and good reliability.The design performance of SOPC based on FPGA,in terms of integration, speed, power and price,has been fully compared to ASIC, while the one-time investment is low and the design cycle is short,which is ASIC can not be compared to. Now for embedded systems architecture began to trasanfer to multi-processor's coordinated work, for the multi-processor architecture, how to interconnect the multi-processor, how to realize multi-processor SOPC, which is people concern. The paper under the Xilinx ISE Design Suite 13.1 development of the EDK platform, proposed that using a 32-bit microprocessor soft-core MicroBlaze as a processor module, realized a SOPC implementation of multi-core processors based on FPGA. Main tasks are as follows:1. Designed a new interconnect solution for multi-core processors, respectively using the PLB bus and the FSL bus to interconnect the three MicroBlaze soft-core together, designed a embedded multi-core processor system based on SOPC.2. On the basis of studying the MicroBlaze soft-core,after researching on the use of PLB bus,LMB bus and the FSL bus,in the Xilinx Platform Studio XPS,built a on-chip multi-core processor system by the BSB wizard, and did appropriate configuration to the hardware elements.3. Under the Xilinx SDK platform, developed and designed software application, it uses shared memory to share data between processors, using native IP core XPS Mailbox and XPS Mutex to communicate and synchronize between processors,using FSL bus to implement fast communication of point to point between the processors.4. Describes the system architecture methods,and debugs the whole system, the results show that the system functions and performance have met the design requirements, the processors interconnection is feasible and practical, the speed of communication between the processors is improved and has the advantages of good flexibility and the high throughput,improves the overall performance of the system.