Fpga-based High-speed Iir Digital Filter Design And Realization

Digital filter is one of the important contents of digital signal process. With its good characteristic of frequency selection in lower order in comparison with FIR, IIR digital filter is widely applied in modern signal processing systems. This paper has studied several common methods to design stable IIR digital filter. Firstly, based on the analysis of IIR basic realization architectures, the arithmetic simulation using MATLAB has been studied according to paralell realization architecture of IIR digital filter, and with the simulation results and theoretic analysis, the final architecture and data resolution of IIR filter has been decided. Secondly, the FPGA design and realization of IIR digital filter has been researched. In order to improve the speed and performance of IIR digital filter, on the one hand, from the structure of the FPGA, the pilelining technology and the parallel-process technology have been studied. On the other hand, from the structure of the IIR digital filter, made use of the decomposing technology to improve the design. These have been validated by MATLAB simulation and Verilog HDL program. At last, the 14th IIR digital filter has been designed and downloaded into Stratix FPGA device. Compared the simulation results with the test results using Altera's SignalTap II analyzer and HP's frequency spectrum analyzer, the design is correct, and can meet the request.